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Verilog Code For Matrix

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26 Threads found on edaboard.com: Verilog Code For Matrix
Hi every body, I am looking for verilog code for matrix multiplication (not involving the use of a cordic core cause that would take alot of space on the FPGA.............I mean is it possible to have a code without CORDIC core used.........) .........if any one knows about it then (...)
i have done with 8 point fft...thanks. Now i want to write verilog code for 2 dimensional FFT which needs defining a 2 dimensional matrix and every element in this matrix is an array of 15 ...can anyone tell me how to write data in matrix..one way is defining an array of (no of rows* no of (...)
Hi, I have a project on writing a n*n matrix inversion by using verilog code. I hope can doing this by using QR decomposition. Can anyone give me some clue on: 1) how can making the code is suitable for n*n matrix by just changing the parameter ? 2) a module that can do floating point division.
ok, i guess ur problem s towards implementation onto a hardware. if u have a static FPGA kit, then finish off the code in vhdl or verilog, find if they get synthesised and then use Webpack(Xilinx based FPGAs) to get them downloaded to the processor... i think could be done in a weeks' time if u are a beginner. /cedance
I want to Interface LED matrix kit(SLS product) on expansion headers of UP3( Altera's ESDK) kit.The kit should be connected with the PC via RS232 on serial port. The input to the board should be given via Hyper terminal from whatever characters Input from the keyboard should be displayed on the LED matrix. 1)Please tell me exact procedure
Some months ago, I wrote a simple crude verilog module (sorry not VHDL) that displays "Hello World!" on the LCD of the Xilinx Spartan-3E Starter Kit. Maybe it will help you. Look in this long discussion for my message dated 07 June 2007:
Dear all, Appreciate if anyone has access to verilog/VHDL code for Gray Level Co-occurrence matrix (GLCM) for implementation on FPGA ORverilog/VHDL code for any general image processing operation that uses spatial convolution such as sobel / prewitt (...)
Iam Hemaja doing My M-tech my project is related to video processing . in that i have taken the frames from matlab and find out the motion estimation in verilog. now i have the problem in synthesizing the code in xilinx . It is showing the INFO:Xst:1767 - HDL ADVISOR message .. and i want to know how give the input frames when i dump the co
I've designed a biquad IIR filter, and I would like to quantize the filter coefficients so that the difference equation can be used in a fixed-point FPGA code written in verilog. The filter input ranges between 0 and ((2^12) -1) fixed-point values. The difference equation is Direct form I ( ), an
sir this is my project pls help me for writing code .and give some suggestion...
i want to write verilog code for 2 dimensional FFT which needs defining a 2 dimensional matrix and every element in this matrix is an array of 15 ...can anyone tell me how to write data in matrix..one way is defining an array of (no of rows* no of der any other method? and also (...)
Hi Some part of my verilog code is like this. for(i=0;i<10;i++) begin for(j=0;j<10;j++)begin acc<=acc+read_memory(); end end As of my knowledge for loop will be unrolled while synthesis. Since memory read cannot be parallel in my case... How to avoid for loop unrolling during (...)
Hi all, I'm working on matrix oriented Processor development (architecture, ISA). I collected a lot of information about this kind of processing. I'm in architecture research and development stage. I have some written code in verilog. This kind of processors are going to be used in science , video , multimedia, anywhere (...)
I want to write some verilog/VHDL code for image processing. Can any image file (e.g. JPEG) be the input of verilog(/VHDL) source code, and after processing the image, the output image be stored as image file (In hardDisk)? The board i used will be SPARTAN II xc2s50.
Hiii Im trying to read an image on verilog. Im supposed to carry out a DWT on an image matrix. Since i couldnt figure out how to convert an image into matrix (Hex) on verilog i used MATLAB imread for it. Now that i have the matrix for it how can i save it on (...)
Can you tell me how to do same thing in verilog? Thanks
Hello Thanks for the response. Im working on the SPIHT Image Compression Algorithm. Iv calculated the DWT of a sample image on MATLAB, then designed the encoder and decoder on verilog HDL. The decoded output is a 16X16 matrix on which i want to perform the Invserse DWT so (...)
I have designed my code in system verilog (Modelsim) and instantiated 2 dimensional array vector, there it shows no problem in compilation and simulation but for synthesizing (Xilinx) the code it shows error(illegal reference to net array) for 2 d array vector... so I would like to convert this to 1 d array (...)
If you have knowledge on VHDL or verilog,the You can write a code for Keyboard logic first then you instantiate your code in your top module of ur project.
Hi guys, i am new at verilog. I generated a working verilog file using Matlab HDL Generation Tool. I tested it with 16 binary bits using assign parameters and it worked for this values. But i need an input random binary matrix. The following code must use this matrix with 16 bits block. How (...)
well i want to implement sobel algorithm for edge detection.. I want to implement this in VHDL or verilog.. kinda very confused.. i want someone who can help me on this.. some codes for sobel's edge detection method. with site gives a code in C, see if
Yes they are! Look in the Xilinx manual. You've probably been reading verilog textbooks, or listening to verilog teachers. They perpetuate many mistakes.
There are plenty of VGA controllers in VHLD and verilog @ opencores.org. for example . -- Amr Ali
the website has some open source keyboard controllers in VHDL/verilog. I have used one of them on an FPGA. You can check their source code to see what they do internally. And either re-implement, or re-use.
you dont define where you're trying to implement this. FPGA, DSP, VHDL, verilog?
Hi I am going to design a code space converter in verilog. Please help me out in this regard. how should i start my projet ? First of all how to provide RGB data as a input & data out in ycbcr format. Please help me to get quick start in this project..... Thanks in Advance.