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21 Threads found on Vhdl Modulation
Don't use a counter use a shift register with the first bit set as 1 and all others set as 0. If you AND each bit (bit-wise AND)... shift reg: 00 0000 0000 0000 0000 0001 fsk_data: ab cdef ghij klmn opqr stuv bitwise AND: 00 0000 0000 0000 0000 000v reduction OR: v shift reg: 00 0000 0000 0000 0000 0010 fsk_data: ab cdef ghij
If I am not incorrect the posts #3 and #1 are independent. If this is so, then you should be creating a new thread. Do you have any vhdl program which will enable us to physically see sine wave with phase shifts,shifting according to the changing value of the input signal. Question is do you want the sine wave gen module to be
Hello, I am using Active HDL 6.1 simulator. In that I can only upto 10us but my design requires a minimum of 17 us. Are there any simulation tools that supports supports 32us run time that are available online. Thank you.
In vhdl, an adder is "+", two input vector of 16bits added together provides a 17bits output, you need to add saturation behind, that's it.
Hello Mates , I'm in deep need to generate a LDPC Encoder and Decoder Module in Verillog OR vhdl for FPGA Implementation. Also 64-QAM Rectangular modulation in HDL is required , can anyone help me out ? Regards Santhosh Kumar Thanna
Implement some Digital modulation technique in vhdl.....
Hi! I am new to vhdl coding. Can anyone provide me vhdl coding for qpsk & qam.
Can anyone help on FPGA based OFDM modulator...i need vhdl programming of OFDM?????
i'm new in a vhdl, need a souce code for bpsk modulation for start. TQ
hi all i need help on writing some coding about digital modulation in communication sys. i just want some guidance from expert in here. please help me. thanks
how to implement vhdl code for PWM with frequency 1kHz and duty cycle of 20%
Hi, I'm currently in the process of developing a control scheme for a custom power device using FPGA. The control scheme processes the error voltage through a PI controller whose output (PI output) is used to phase modulate the sinusoidal waveform (50 Hz). The phase modulated waveform is then compared against a triangular carrier wave to generate
Hi, I've just studied FPGA for a short time. At that time, I've built successfully a QAM-16 modulation project using vhdl code. But now, when I try to build QAM demodulation, I've met a big problem. I've done the demodulation in matlab, but in FPGA, I can not synchrolize the receive signal with the carrier recovery. I (...)
Hello salam2000; Can you, please, explain more? Also have you any vhdl file implemented it?
Hi. I've got a little problem with implementing qam modulator-demodulator model. First question is: do I have to implement FIR filter in both blocks or can I skip it (if it's easier) ? Second: How to synchronize modulator & demodulator? I'm creating this model in vhdl (quartusII). Maybe someone already did it and could share his experience
Hi friends, Does anyone have book(softcopy)on modulation/demodulation techniques implementing in vhdl.. If so please upload..I desperately need it.
i am new to vhdl. Is it possible to design fsk, psk modultion and demodulation in MODELSIM( bcoz thats what i have), i dont know how to bring sine wave in that..can anyone help me. otherwise anyother simulation tool is available for this???
Hell everybody, I'm working in vhdl-AMS modeling of Fractional-N sigma-delta PLL, and I'm looking for some vhdl-AMS codes of sigma-delta modulators that can be used to do the modulation of PLL. I'm also interested to talk and share information with people that work in this subject... By the way, every help related to this subject (...)
i am now implementing a modem use fpga. i know the modulation is much easier than demodulation. The difficulty i met now is that i have no idea how to relate the schematic diagram with the vhdl. For instance, i know the costas diagram, but i do not know how to implement it with vhdl. anybody could help me ? thank you
hi, I just found out that my board support vhdl code. And I'm new in vhdl. could anyone help me to find vhdl code of GMSK? Thanks. Pls kindly help me.
i using vhdl simulation software MODELSIM SE, i planned to write a code for fsk,psk modulation and demodulation, can anyone help me on this, and also i need use work.sine_package.all library to be included in that, where i can find that??