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38 Threads found on edaboard.com: Vhdl Programs
Hi, I got a task of merging netlists of 3 vhdl programs into one netlist using graph merging algorithm named clique. The steps to my understanding will be 1 converting each netlist into graph 2 match graphs of each netlist and apply clique algo to merge similar portions. 3 convert back final graph into a netlist and map on fpga. I can co
Hi I got a task of merging netlists of 3 vhdl programs into one netlist using graph merging algorithm named clique. The steps to my understanding will be 1 converting each netlist into graph 2 match graphs of each netlist and apply clique algo to merge similar portions. 3 convert back final graph into a netlist and map on fpga. I can co
For vhdl simulation, i used Modelsim & Xillinx . Are there any other simulation programs?
Let me venture a guess...you've been writing software and thought to yourself Verilog looks like C and I'm good at software so I can now write Verilog software for FPGAs? Well let me tell you. No it's not for writing software programs. Verilog and vhdl are hardware description languages so unless you know what the underlying logic circuit looks
First of all vhdl is not a programming language, so don't try writing SW programs with vhdl. vhdl is a hardware description language. So think of what the hardware that is required to do what you want. Your drawing doesn't show how the HW would function. You would need a multiplexer on the input of each counter so you can (...)
i need all digital pll with 3 to 10 ghz frequency in vhdl program with spur reduction
Good explanation from this book: But you need to convert the vhdl code to Verilog. Thanks.
Hello, I m working on a Altera DE2-70 board, and i need simple vhdl/verilog programs to make use of all the resources in the system. The available resources are ? 2-Mbyte SSRAM ? Two 32-Mbyte SDRAM ? 8-Mbyte Flash memory ? SD Card socket ? 4 pushbutton switches ? 18 toggle switches ? 18 red user LEDs ? 9 green user LEDs ? 50-MHz oscil
Hey Guys. I've been tasked to come up w/ a lines of code (LOC) program to count the number of lines for vhdl. I need to count the physicial lines of code, logical lines of code, and also the number of commented lines. Anyone have any ideas on an algorithm I can use for this?
check this Re: PN CODE GENERATOR
check my website about simple programs: All About vhdl Codes, PCB Designing and AVR
Hi every body, please guide to me for vhdl coding, how to start the this course? which one i'll started?
A vhdl core mean a circuit or an ip described in vhdl. Yes you can write and some design houses sell their cores as vhdl models. There are a lot of protection methods and tool vendors. -- Amr
do u have any idea to write programs for digital VCO design in vhdl??
can anybody help me this...i need programs which are synthesizable in xilinx ...urgently for T.E project Hi, You can try basic codes like counters,shift registers,flip-flops.These codes are synthesizable in xilinx.For that you can browse these codes in internet either in vhdl or verilog. Cheers,
i need to execute vhdl programs like logic gates , d flip flop, counters, multiplexers and demultiplexers in XLINX 7.1 i have the software and programs also but i dont know how to simulate to get output waveforms plz help me.......................................
hi is there a detailed paper about writing vhdl test benches? i found an xapp199, but it seems to be short. all the other google results are even shorter, or they are product web pages for programs i never heard about... i did some vhdl projects and always used the graphical stimulus editors. now i want to learn writing proper (...)
Hello, I am beginner in vhdl-AMS, I will try to model a real Op Amp in vhdl-AMS. As a begin, I hope that some one help me by giving me a simple code in vhdl-AMS of ideal op-amp. Thank you very much
you can convert from matlab source to vhdl under certain conditions that type of programs are called synthetizers. There is Accelchip that does that type of matlab to vhdl synthesis .But is pretty expensive ! if you use matlab internal functions you better be shure that the software that converts to vhd supportes them (you should say (...)
never heard.... only heard Verilog/vhdl can burn into IC.
can u send me the vhdl code for the 2 bit random number generator and 3-8 bit decoder?
Hi all. I am using lpm_divide megafunction in one of my programs in vhdl. I have instantiated this megafunction in the various entities. But it shows warnings saying the function is not bound. # Refreshing C:\Documents and Settings\UB\Desktop\MTech_PROJECTS\ofdm_sharada\IFFT\work.path7(arch_path7) # -- Loading package standard # -- Compiling a
Hi i'm an italian student. I need to implement for my thesis a vhdl FFT with a parallel input of dates coming from a polyphase FIR filter. I'm using xilinx ISE. Im not so practice, there's someone who can help me? thanks a lot.
this is one of my favorites :D that's for vhdl .... for Verilog, there's the book of Morris Mano (digital design) it makes you learn digital circuits by implementing them in HDL (verilog used here) it's on the forum and it's a great book
I have just studied vhdl language and Verilog language! I don't know Which program I can use write my code , and which program can simulate my CODE thank for attension my topic
Could any one provide me the code for serial in parallel out and parallel in serial out shift register in STRUCTURAL? i did it in behavioural bt cud nt do it in structural!:cry:
Hay All, Can anyone help me with a matlab/simulink/vhdl GSM modulator and/or demodulator design? I need to implement a basic GSM modem for my DSP project and I need some help. 10x
Xiling provides free software for vhdl. U can download xilinx project navigator which can be used even for synthesis.
Dear All, I'm trying to get Spice netlist file from Verilog/vhdl. After I synthesized the vhdl file using DesignCompiler, what tools available that can help me to get the spice netlist. I need the interconnect information incorporated in the spice netlist. Any help will be very useful Thanks in advance,
Hi everibody I use ise 6.1 and I would like to know how to convert code verilog into vhdl . Thank's in advance :o
"vhdl Programming by Example"
if this gals is globally asynchronous locall synchronous design...then i might help..you i had done vhdl simulation on this topic..
Hi, Protel Multisim Xilinx webpack There are many other CAD programs. But i prefer that you use vhdl to do that. Bye
hi all may be this is a very simple question ...... i need to know how to trace signals manualy without using any programs in vhdl code and put them in a table like this ------------------------------------------------------------------------------------- time delta delay signals --------------------------------------------
Hello, I would like to learn TCL because many EDA programs communicate between them using it. I have some book but I am only interested in learn TCL for this particular application. Could someone sharo any tutorial/course/ebook about this subjetc. As an example I am interested in the TCl scripts between Xilinx ISE and vhdl simulators. Best r
Hello, I would like to learn TCL because many EDA programs communicate between them using it. I have some book but I am only interested in learn TCL for this particular application. Could someone sharo any tutorial/course/ebook about this subjetc. As an example I am interested in the TCl scripts between Xilinx ISE and vhdl simulators. Best r
You can design vhdl visually by using such programs as Active HDL, HDL Designer, Visual Elite.
can any1 help-me with some vhdl bmp to jpg compression core or some c code for 8 bit controller? thx, //a