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1000 Threads found on edaboard.com: Weak Pullup
The datasheet of a 16F877 says weak pullup current 50 to 400 uA at 5V which means the weak pullup can range from 12K5 to 100K. I often use them if I have to connect keys to a pic so I do not need any external resistor to +5V. If you do not enable the weak pullups the pin is floating if (...)
A weak pullup will hold a value on a pin while all other drivers are in tri-state, and can be over-ridden by the value of the driver, once it starts driving. A strong pullup cannot be over-ridden by the driver, and will cause contention.
Hi hch16550, All four ports 0,1,2,3 of MCS51 are bidirectional. However only port 0 is considered "true" bidirectional, because when configured as an input, it floats. Ports 1,2 and 3 are sometimes called "quasi - bidirectional" due to the fixed internal pullups. You can read a good document about hardware inside standard MCS51 at: http:
i have another question? what is weak PULL-UP? this is also a feature of the PIC controller? can someone explain this feature. thanks If you enable "weak pullup" on PORTB it is like you have connected 8 pullup resistors with a value of about 47K to 250K from PORTB0 ... PORTB7 to +5V. On some small PIC's like
Hi, Like Davood Amerion says, you can use most any pins of the CPU. BUT, if you choose ones with an internal weak pullup (and enable those weak pullups), you'd require 2 components less, and make your PCB that much simpler. Regards, Anand Dhuru
now the problem has been fixed by adding option of 'weakgate' when 'run build_model' . the pad cell has weak pullup or pulldown, which TetraMax regards as contention. hope to be helpfull to others.
Tristate logic can cause power waste. adding a weak pullup or pull down to the net would remove the power waste
Here is the reason: Quasi-bidirectional output type can be used as both an input and output without the need to reconfigure the port. This is possible because when the port outputs a logic HIGH, it is weakly driven, allowing an external device to pull the pin LOW. When the pin is driven LOW, it is driven strongly and able to sink a fairly l
It would be helpful to see all the source code, if it's not confidential. In your simulator display, be sure you aren't confusing the floating 'z' state with the unknown 'x' state. Signal contention (two drivers fighting with each other) can result in an 'x' state. By the way, your test bench is not simulating the open-drain nature of I2C. It
Wanting to use MCLR as interrupt port change state - its set high. Prefer to use weak internal pull-up. Tried this: ioc.3=1; intcon.GPIE=1; //enable IOC bit for GP3, then GPIE //in ISR checked for state when button pressed high to low thusly: if (GPIE && intcon.GPIF) //nosuch IRQ not being called The logical port to use would be GP2/ext int p
Here is a job: To sense ambient light change as a switch from say day to night, with eg PIC10F206. Device between input port with weak pullup enabled, and VSS. Possibly use the comparator for validity of change and hysteresis. Assume LDR is the better of the two options or is there another device to consider mainly need lowest cost part thanks v
Hi Silver, From your description it looks like you need a range of just a few cms between the IR source and the detector. If you shield and align both properly, you should get away with directly connecting the IR receiver diode to the PIC's input; use a pull-up from this point to +5v. When the receiver sees IR, the port pin will drop to 0. Choos
it appears that you are driving the data line high during the read I don't think so. The code seems to be dedicated to 8051 standard IO. It has open drain ports with weak pullup, without any data direction register. There's no risk of driving SDA high with these interfaces.
hi i need code which generate ir 38 khz pwm using pic12f675You do not normally need PWM for 38KHz IR, just square waves. This should do it: ;IRTX - use MPASM in relocatable mode #include p12f675.inc ;with analogue __CONFIG 0x0184 errorlevel -302 ;prevent bank select warnings #define irou
Hi i am trying to enable IOCB feature in PIC ... i am trying to use interrupt on change on RB 4-5 port . I have enable the weak pullup feature and that seams to be fine , but the IOCB ports which i am enabling do not seem to change the value .I am using proteus VSM to check the values ..But the IOCB shows 0 .
weak pullup and similar CPLD properties are hardware features that have to be defined in vendor specfic constraint files or configuration tools. It can't be set in generic HDL, may be with vendor specific attributes. I can confirm that Cool Runner II offers weak pull-ups according to data sheet. But I'm not using Xilinx and can't tell you (...)
I don't think it is possible to disable the weak pullups on this micro. It is basically an 80C32, where the pullups are always on, to allow the I/O pins to function as both inputs and outputs, simply by clearing the port latch; there is no data direction register. Is it really that important to have the pullup disabled? (...)
Hi ho, I have ap roblem with a entlist and DC 2001.8 under linux. In the netlist, there are a few verilog statements with the keywords pullup and pulldown ( i,e, pullup (zero) ). So, my DC cannot read in this. "pullup not supported by synthesis" or "error at or near token pullup" ( only one instantiated module (...)
Hello, When I use ATMEL AVR MCU, it has internal pullup for input. If I connect a push button switch to this pullup input pin, shall I add a resister to this pin? If so what is the value of the resistor or what is it current? Thanks!
How to determine which value is the best to be used as pullup for I2C? Any idea's?
Usually to work on the mobile phones you MUST have: 1) Schematic diagram; 2) Good experience; 3) Mobile tes instruments. Anyway, let's try to solve the problem. a) If the signal strenght is weak, but is possible to receive the call, this means that the I/Q demodulator and the Local oscillator are working properly; b) Check the pin diodes us
Hi endikus, your schematic is OK as far as I can see. You must use pullup resistors to +5V (4K7) at each output of your 89C52 which is driving the ULN. The internal pullups of 8051 are too weak to fully switch on your ULN. hope this helps, best regards
Another question,usually,what's the internal pull-up resistor value can be called weak pull-up?
No, a weak pull-down is a large resistance (or equivalent, i.e. it might be an active device on a chip), as high a resistance as possible which overrides any leakage currents to guarantee a valid logic 0 voltage. Smaller values would waste power when driven high, higher values would not guarantee a logic 0.
If you say tracking, what do you expect this tracking output to be: a dc voltage fed to VCO, signal of the same frequency as your weak signal (usually output from VCO is a square wave) or what? You may need to buffer this weak in order to maintain its amplitude ..
Are you sure that M2 and M4 really are in weak inversion? If the current densities are high, they will not be in weak inversion, and your PTAT current will not intercept at 0 kelvin. It seems that this is likely, given your results of zero tempco at 1.8V rather than near 1.2V. Try making M2 an M4 significantly wider (or add large multiplier)
Hi, When FPGA/CPLD is unprogrammed or disable state I/O pins are in Hi-Z, weak Hi (pullup Hi) or Bus-keep state. In that states you can not burn I/O pin. If chip is with good latchup protection and designed for live insertion, you can insert chip to socket with power on without worry.
Hi, power-twq I think that you maybe make a mistake. The lib of X1, X2, X3 ... are only for drive ability. In each process lib, there are some pad for weak output, such as pull-up pads and pull-down pads. You can request those datasheet from TSMC or SIMC etc. Good Luck
You didn't say which FPGA or how the input is configured. If the input pin is used internally, then the typical FPGA input is very high impedance, so the signal will float. You breathe on it and it will probably change state. It may pick up noise or consume extra power too. Some FPGAs provide configurable pullup or pulldown resistors on input pins.
Hi, could anyone please provide some materials on dc offset of transistor pair in weak inversion and the thermal noise, 1/f noise of transistors in weak inversion as well? I could only find information on current mismatch of current mirrors in weak inversion from IEEExplorer. Thank you.
I have designed the bias circuit shown in the picture. M1 and M2 are deeply in saturation, M3 and M4 are in weak inversion. I know that, I can mirror Ibias from node VBP where PMOS tranzistors are in saturation. My question is following: Is it possible to mirror Ibias from node VBN where NMOS tranzistors are in weak inversion.
in digital circuit,we can find many pullup or pulldown Resistors in output our input port!but how to select that kind of resistors in our own circuit?anyone can help!i really have no idea about that!thanks! :|:|:|:|
:idea: : I consider a :arrow: tristate input x :arrow: tristate output e :arrow: tristate enable (active high) gate U1, U2 and U3 U1(a) connected to '0' U1(e) connected to first input U1(x) connected to U3(e) + pullup U2(a) connected to '0' U2(e) connected to second input U2(x) connected to U3(a) + pullup U3(x) connected to a
What Is pullup resistor? Where pullup resistor is used?
plzz someone elaborate on the difference between external pull up and internal pull up for a microcontroller port pin .. :?
Hi, I face some problems in designing a full CMOS SRAM cell: 1. The choose of W/L ratio The W/L of the back-to-back inverters should be the same? I saw this in somewhere. I was confuse by that because in a latch, the forward inverter should be stronger than the feedback inverter... The Wordline transistor should have smaller W/L com
Hi, I face some problems in designing a full CMOS SRAM cell: 1. The choose of W/L ratio The W/L of the back-to-back inverters should be the same? I saw this in somewhere. I was confuse by that because in a latch, the forward inverter should be stronger than the feedback inverter... The Wordline transistor should have smaller W/L compare
Dear Forum Members, Tell me about how to calculate the value of a pullup and PullDown Resistors, Tell me from very basic. Also how these resistors works.
In a std CMOS inverter, if we interchange pMOS and nMOS transitors, without changing the voltage terminals,They say it will become a weak buffer, Please someone emphasize on this....
Dear All Pls instruct me how to design analog circuit in weak inversion. Can u share some files to read more efective papers? Regards lewikan
many MCU's P0 port need a external pullup resistor?? why?? the datasheet said it is P0 a open drain port. what's a open drain(open collector) circuit ? and why it needs a external pullup? thanks
I want to add a weak pull-down resistor on 3-state output buffers and bidirectional buffers in Xilinx FPGA, I have tried to code it like this: IOBUF KIO_0 (.O(KIO_I), .IO(KIO), .I(KIO_O), .T(!we)); IOBUF KIO_1 (.O(KIO_I), .IO(KIO), .I(KIO_O), .T(!we)); IOBUF KIO_2 (.O(KIO_I), .IO(KIO), .I(KIO_O), .T(!we)); IOBU
... in an NMOS process, logic circuitry is often constructed using a weak transistor that is always on and one or more strong transistors that are switched on and off. In NMOS the weak transistor is used to generate a high output voltage level or 1 when the strong transistors are turned off. When a strong transistor turns on it overwhelms t
Hi, I heard people saying a device is strong or weak. How is a device characterized by weak or strong? What are the properties of each terms of VDS, Rds...etc. For example, in a given current, if device is strong, less VDS is required to be in saturation..etc... thanks Strong device is the device that h
I tried to design a low power opamp, what is the negative effect if all the transistor works in weak inversion?
Hi What exactly is meant by weak inversion region in MOS ?
In the VHDL langguage, the std_logic type has 9 states including "weak high", "weak unknown","weak low",etc. And i dont know the differences between "weak high" and "forcing high","weak low "and "forcing low" ,"weak unknown" and "forcing unknown". Can anyone help me? thank you! (...)
For the weak-inversion design, foremost in my mind is that you must pay attention to the mismatch, becasue the mismatch characteristicxs would be wores when working in weak-inevrsion regipn.
No. The pull-up resistor only acts as a "weak" pull-up source. So when slave drives low, the net will be pulled-down to '0'. -------------------------------------------------------------------------------- You can also refer to the open-drain circuit.
The output of 8051 (both C51 and S51) is not a push-pull type output. It is a weakly pulled-up open-drain type output. It can sink large currents (5ma or so) but can source only a few micro-amps. So if you feel that the output is not capable of driving properly, you connect about 4.7kohm resistors between the port pins and +5V. Alternately, you c