| Search found 17 matches on edaboard.com: xilinx pcb layout xilinx pcb layout xilinx pcb layout agha xilinx jtag cable pcb layout xilinx jtag cable pcb layout |
a question to experienced engineers about industry
hi all,i am a master student in computer engineering.i am looking for internships these days. because of being in computer engineering field, i have skills on computer programming and digital system design. i am not excellent on both sides and also i...
EDA Jobs, Promotions, Advertising :: 17 Jul 2009 17:02 :: Dmitron :: Replies: 4 :: Views: 439
orcad and pld
there a possibility to generate .jed file from orcad.2. if its possible how to use atmel chips. when i run programmable logic project wizard in orcad, there is no atmel vendor. only actel, altera and xilinx.thanks in advance.pavel......
PLD, SPLD, GAL, CPLD, FPGA Design :: 25 Mar 2009 4:21 :: Mr.Cool :: Replies: 2 :: Views: 576
regarding fpga board design
dear all,i am new to fpga board design, may i know the basic steps to be followed in the fpga design board and may i get any reference books for this.thanks,r balasubramaniaraju...
PCB Routing & Schematic Layout software & Simulation :: 04 Apr 2008 22:17 :: echo47 :: Replies: 1 :: Views: 201
bga layout guidelines
hi all,anyone could upload the layout guidelines for 0.8mm bga chips trace width, via size and clearnces. any help would be greatly appreciated.thanks in advance.rajkumar...
PCB Routing & Schematic Layout software & Simulation :: 18 Mar 2008 4:32 :: sandhya.im :: Replies: 10 :: Views: 1971
problem with altium designer
the tool is very slow and get near to 1g ram, for a design that contain only 2 x 1148pin fpga and 16 x pqfp100 with few other cap and res.:cry:is it true to say that tool is not suitable for component count more than 512?if so, what other tool do you...
PCB Routing & Schematic Layout software & Simulation :: 30 Dec 2007 0:58 :: House_Cat :: Replies: 133 :: Views: 7233
free lancers
hi,we are a group of experience developers in singapore & malaysia region.we are specialized in:1. embedded system development. (arm based, pic based, rabbit/zilog based)2. xilinx based fpga development. (we did virtex 5, 4, spartan 3)3. pcb layout (...
EDA Jobs, Promotions, Advertising :: 07 Dec 2007 13:28 :: Impressa :: Replies: 2 :: Views: 315
pcb layout file for si analysis
hi,i am learning hyperlynx tools for si/emi analysis.i have gone through the tutorial given with this package.i have also done few sample exercise given with this.now i want to use this tool on some real life pcb layout file.if some body can provide ...
PCB Routing & Schematic Layout software & Simulation :: 31 Aug 2007 14:34 :: venkat_kvr :: Replies: 1 :: Views: 234
ad &fpga
how can i interface nis adc081000 (1ghz) to a fpga(200mhz)? thanks...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02 Jul 2007 1:17 :: calm :: Replies: 13 :: Views: 549
xilinx fpga router error,can someone heip me?
hello everyone, i use a pair of lvds signals as the differential clks of dcm,when implementing the design ,i encounter an error as follow:this design contains an lvds pair.the pair of ios must be palced in a specific relatice structure.what should i ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 30 May 2006 5:25 :: shoufeng_luo :: Replies: 3 :: Views: 153
questions about termination and pcb layout
hi all, im designing a board which has an fpga xc3s1500 interfacing with qdr sram memories. it works at 100 mhz (effectively 200 mhz because the qdr memory uses both rising and falling edge - ddr). i read some documents about designing high speed pcb...
PCB Routing & Schematic Layout software & Simulation :: 27 Feb 2006 11:22 :: sugvivek :: Replies: 2 :: Views: 336
xilinx download cable iii or iv schematic
anyone has the xilinx download cable iii or iv schematic? i need to program coolrunner using the web-pack software, but there is no mention about the download cable.asic...
PLD, SPLD, GAL, CPLD, FPGA Design :: 28 Jan 2006 9:18 :: bamdad :: Replies: 11 :: Views: 8125
how to simulate this system? orcad can do? or others?
i want to simulate my system:one virtex4 fpga and some other leds and others, i have all rtl file(writen by verilog) for the virtex4 fpga, and the schematic of the fpga and other parth are aready designed by orcad capture. can i simulate this system(...
Software Problems, Hints and Reviews :: 22 Dec 2005 20:31 :: jhallows :: Replies: 5 :: Views: 444
xilinx jtag cable pcb layout
hi everyone,is anybody having pcb layout of xilinx jtag cable.thanks...
PLD, SPLD, GAL, CPLD, FPGA Design :: 21 May 2005 20:35 :: agha :: Replies: 7 :: Views: 1047
some useful deisgns for downloading
therere some new collections on the download section of our website, now contant:web server based on msp430, shematic and layoutevaluation board of samsung s3c44b0, schematic and layouta basic daughter board of msp430f133, 135, 147, 149, schematic an...
Microcontrollers :: 22 Apr 2005 4:10 :: ezpcb :: Replies: 0 :: Views: 420
highest bga pin
hi i would like to know the highest no of bga pins that anyone have succesfully routed and may i knoe what is the name of the i/c & whats it use for?regardstaring...
PCB Routing & Schematic Layout software & Simulation :: 29 Jul 2004 12:53 :: majnoon :: Replies: 8 :: Views: 924
board level design
i was wondering if anyone out there doing this stuff can tell me 1) what skills are required for am fpga board level design2) what tools?3) whats the neccesary background?i am quite comfortable with the chip level design for fpgas. i would like to ge...
PLD, SPLD, GAL, CPLD, FPGA Design :: 07 Jul 2004 17:55 :: delay :: Replies: 4 :: Views: 1107
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any tip for layout board with bga?
any tip for layout my first board that use bga? using orcad...
PCB Routing & Schematic Layout software & Simulation :: 03 Apr 2003 0:31 :: ted :: Replies: 4 :: Views: 660
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