10 Threads found on edaboard.com: Xor Gate Using Cmos
well i am not sure but iguess you could implement the cmos in verilog and then map it... to form xor... cmos can be implemented just as a NOT gate or you could also implement as VTC curve...
PLD, SPLD, GAL, CPLD, FPGA Design :: 31.01.2008 17:41 :: haneet :: Replies: 2 :: Views: 2119
Is that possible to design a xor gate using only 6 transistors
pls let me know
ASIC Design Methodologies and Tools (Digital) :: 31.08.2007 03:02 :: santuvlsi :: Replies: 8 :: Views: 3671
how to realize a xor gate?/ thanks
Analog IC Design and Layout :: 18.10.2007 06:33 :: benever :: Replies: 8 :: Views: 5120
For making xor gate you can make use of 8 gates, 4 pmos and 4 nmos using simple relation for xor= (~A)B+A(~B)
As far as 2:1 MUX is concerned, there are many options. You can use NAND gate, Transmission gates, pass transistor.
ASIC Design Methodologies and Tools (Digital) :: 21.11.2011 13:41 :: abhiverma812 :: Replies: 6 :: Views: 7660
How can you not know the transistor level circuit of xor when you know how to implement xor with transmission gates ?
Electronic Elementary Questions :: 04.04.2011 00:47 :: lostinxlation :: Replies: 4 :: Views: 6969
use a delay then xor the delayed with the undelayed.
the pulse width is the delay unit used
Analog Circuit Design :: 30.05.2006 11:41 :: safwatonline :: Replies: 3 :: Views: 1899
I am having a problem with my simulation result when I designed the OOK Manchester capacitive load modulator for 13.56MHz RFID tag according to ISO14443 Type A standard. The followings are my circuit design for the modulator and the simulated result by using Mentor Graphic software TSMC 0.18um technology.
RF, Microwave, Antennas and Optics :: 03.12.2009 04:48 :: flying_fish :: Replies: 0 :: Views: 3068
Please, could you clarify me the following confusion regarding Static cmos logic?
In the Rabaey book, it is said that "Static cmos gate is naturally inverting and the realization of a noninverting Boolean function (such as AND , OR, xor) in a single stage is not possible."
I don?t completely understand th
Electronic Elementary Questions :: 19.05.2011 08:18 :: palmeiras :: Replies: 3 :: Views: 866
I am trying to design an xor gate...but the instructor has asked us to merge two pmos transistors in the design...
kindly provide me the solution...
I am using cadence 6.1.5
ASIC Design Methodologies and Tools (Digital) :: 02.06.2012 14:34 :: pavanucs :: Replies: 4 :: Views: 662
Its well known that all gates can be derived from NAND and NOR gates...But is it that in all digital IC's are other gates like AND ,OR and xor gates are made up of NAND and NOR gates... does the other gates have seperate circuit using less number of (...)
Electronic Elementary Questions :: 01.06.2007 12:19 :: lordsathish :: Replies: 3 :: Views: 1441