1000 Threads found on edaboard.com: Zero Luck
i need some way to let my microcontroller know when a zero cross occurs, otherwise i cant keep phase with my little light dimming project.
i saw plans for using a 4n25 (the most primitive of optocouplers: merely a transistor pretty much), but i havent had much luck actually making it go. it pretty much just hooks the LED input up to the AC
Analog IC Design and Layout :: 01-14-2004 05:26 :: Myren :: Replies: 3 :: Views: 6427
The descprepancy might originate from your hand calculation is not accurate enough: the Cgd of the input transistor is not easily calculated by hand. You should rely on the simulator to give you more precise number.
A sanity check also reveals that the zero can not be at over 100GHz frequency. 40~50 GHz is a more reasonable number.
Analog Circuit Design :: 02-29-2004 18:52 :: willyboy19 :: Replies: 6 :: Views: 1926
Give here ur VHDL example for weak zero. I will write equivalent verilog for that!
ASIC Design Methodologies and Tools (Digital) :: 06-03-2005 08:16 :: nand_gates :: Replies: 5 :: Views: 4097
Here are some other examples of zero crossing detectors ..
Microcontrollers :: 04-17-2006 21:45 :: IanP :: Replies: 5 :: Views: 3924
If you are talking about power line zero crossing, then have a look at microchip application note AN958, you will find the answer there.
Microcontrollers :: 04-18-2006 04:29 :: gidimiz :: Replies: 3 :: Views: 1991
I can help you explaining a fundamental topic related to circuit theory:
As you can see in the following pic. the transfer function has a LPH zero as well as two poles; really this zero at -1/R1C1 is negative since we don't have any dependent sources (or active elements) in the circuit (this phenomenon is valid for its poles locations).
but as yo
Analog Circuit Design :: 12-15-2006 05:56 :: Guest :: Replies: 5 :: Views: 1853
Magnetic field outside a long solenoid can never be zero. Because a solenoid of finite length will have edges and field will come out. However, if we imagine a straigth solenoid of infonite length or a toroid, it will not have edges from where lines of force can come out. therefore field would be zero outside a toroid or a strigth solenoid of infil
Mathematics and Physics :: 06-09-2007 07:54 :: nonlinear :: Replies: 2 :: Views: 1718
i need a code for zero forcing algorithm to supress interference plz help
Digital communication :: 06-10-2009 09:02 :: juliana :: Replies: 2 :: Views: 1750
hey u means ∂^2 π=0 na?
then well i dont know the exect derivation but del= partial derivatives...
and the pie is a if u go for double derivatives of pie it will be zero only..
that was as per the best of my knowledge...
PCB Routing Schematic Layout software and Simulation :: 09-18-2011 04:37 :: jigisha :: Replies: 1 :: Views: 602
I want to make transformer based power supply. I used 12-0-12 transformer. I want to get 24V from both end. after that 24V to 5V. in the mean time I am also want square wave for zero cross detection. I put 230VAC on primary winding. we already know that there is a phase shift between primary and secondary of tra
Analog Circuit Design :: 03-08-2012 21:51 :: manikandan123 :: Replies: 12 :: Views: 1145
I just un-installed my MatLAB otherwise i would have checked it properly.
Adding a zero z will change the root locus plot of the system. Its may be the reason that when we convert open-loop system to close loop. z will be introduced in denominator. Which will change the response of the system. Plot your system here
Analog Circuit Design :: 07-08-2012 02:39 :: Chullaa :: Replies: 4 :: Views: 902
how to make a zero crossing detector circuit using 8051
Robotics and Automation Forum :: 07-13-2012 07:24 :: kaus9952083382 :: Replies: 4 :: Views: 1697
zero IF means zero Intermediate Frequency, that is, IF stage in reception process do not exist.
Some related words are
(1) Direct Conversion
(2) Low-IF receiver because low-IF is hard to implement in ICs
Professional Hardware and Electronics Design :: 07-05-2002 20:29 :: Rayengine :: Replies: 2 :: Views: 1163
Thanks. I searched for APC-7 on their site with zero results. They only mention a 7mm to N adapter. I will email them to find out what it is.
Professional Hardware and Electronics Design :: 12-20-2002 19:14 :: E-design :: Replies: 3 :: Views: 1566
In the analog world a method that is within 1 dB of optimum is
1. Slice the base band data signal to get hard limiting
2. Low pass with a 1 pole filter at 3/8 of the bit rate
3. Square (full wave rectification will also work but is a few dB worse
4. Filter out the spectal line at the bit rate
Can this be approximated in your FPGA?
ASIC Design Methodologies and Tools (Digital) :: 01-09-2003 12:03 :: flatulent :: Replies: 9 :: Views: 3255
I instantiate a Coregen generated adder in my design, and synthesized using FPGA Express. The timing report shows zero timing delay on this particular adder, which is not correct. The actual delay can only be reported after place and route. Anyone knows why? Thx.
PLD, SPLD, GAL, CPLD, FPGA Design :: 02-07-2003 10:01 :: jkfoo :: Replies: 4 :: Views: 1783
Can somebody know 5.6Ghz Sigle Chip Transciever for zero-IF WLL ?
RF, Microwave, Antennas and Optics :: 02-12-2003 12:52 :: Jackal :: Replies: 0 :: Views: 737
Altera Pci core...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02-14-2003 05:42 :: myertas :: Replies: 3 :: Views: 2143
you just need an IR Led for transmiter and a photodiode for reciver.
This way you can build the electrical interface of IRDA.
Next, you need to write a few lines of code yn your mcu for inplement a much like software uart. Main difference are that IRDA signals are zero Return (ZR) insted of RS232, wich are Non zero Return (NZR).
PC Programming and Interfacing :: 05-26-2003 20:07 :: ghbolivar :: Replies: 1 :: Views: 1494
That is an outdate method!
If the offset appears early in the gain path (natural with a zeroIF mixer) the digital offset correction should have a dynamic range of the signal + offset*gain. More bad news are that the offset could clip some amplifiers in between. Some guys think about feeding back a DAC to the mixer output. It helps a little bit b
RF, Microwave, Antennas and Optics :: 07-11-2003 02:35 :: rfsystem :: Replies: 7 :: Views: 1232
You can make a traditional differential pair and put one input to ground and the other to your signal. The output will flip at the zero crossing point.
Hobby Circuits and Small Projects Problems :: 09-01-2003 11:22 :: flatulent :: Replies: 2 :: Views: 3462
Many thanks for replies. :)
So problem is: I need to limit current from both side(zero current detection and current limiting). I look thourght you suggestions... so i need some thing cheapest. May be i can simply use something like LM324 to get diferencial signal from sensing resistor? Are there any other suggestions
Best regards, kot_b
Hobby Circuits and Small Projects Problems :: 10-06-2003 17:49 :: kot_b :: Replies: 6 :: Views: 3058
I need to find a way to measure AC Line current and/or Current zero crossings. If anyone can help with pointers or circuits that would be great!
Robotics and Automation Forum :: 10-05-2003 19:53 :: mrmookiebud :: Replies: 12 :: Views: 6240
If power is a real issue, you can use a zero power or low power version GAL, or switching to a zero Power CPLD. Lattice has now ultra low power (10?A) standby CPLD.
PLD, SPLD, GAL, CPLD, FPGA Design :: 11-03-2003 14:52 :: lucbra :: Replies: 2 :: Views: 872
it is possible. But pls tell us why u want 0 thickess for 3D solver?
after u define curve, cover curve. Define material.
For meshing zero thickness material, u have to change to staircase mesh.
Hope this helps.
Thanks a lot in advance.
Could I define "zero" thickness metalization in CST
Electromagnetic Design and Simulation :: 12-02-2003 04:59 :: Element7k :: Replies: 3 :: Views: 1896
I'm controlling several relays and leds by pic. All of them are drived by transistors. But when a relay is deenergized or turned off, ports of the pic which are connected to leds are drop to zero for an instant then rise to 5V again. What may be the reason for this? A reset? (I didn't try whether it resets or not, yet) or something another? And how
Microcontrollers :: 04-16-2004 17:48 :: seyyah :: Replies: 11 :: Views: 1135
I am doing a research on the Opamp pole/zero design, would somebody
provide me some info abouth this topic? Paper or thesis ... All are welcome!
Thanks a lot! :P
Analog Circuit Design :: 04-28-2004 01:58 :: johnli100 :: Replies: 6 :: Views: 1983
Use the detector output as a clock, then connect to counter's clock input to count the no. of zero crossing.
Analog Circuit Design :: 05-01-2004 11:55 :: kwkam :: Replies: 4 :: Views: 2395
Yes, starting from IC5.033 there is pole-zero analysis - if you go to analyses section in ADE, you will see it as pz.
Software Problems, Hints and Reviews :: 06-08-2004 15:05 :: sutapanaki :: Replies: 7 :: Views: 1915
You first have to make a zero cross detector, as you may want to start sampling at zaro-crossing.
Digital Signal Processing :: 06-25-2004 02:47 :: asit :: Replies: 15 :: Views: 2472
If no current source is used ,the output oscillation swings between -Vdd and Vdd. If a current source is added the oscillation amplitude will be equal to IbiasXRtank (for IbiasXRtank
RF, Microwave, Antennas and Optics :: 07-22-2004 07:33 :: a.abbas :: Replies: 2 :: Views: 1404
There no such a thing called zero holdtime in real life, up until now it is a fantasy.
As power-twq mentioned, zero hold time is no fantasy when viewed from
outside the chip. If you admit to internally delay the data line by the internal
flip flops hold time, this will extend the externally required data setup time by
PLD, SPLD, GAL, CPLD, FPGA Design :: 06-19-2005 06:01 :: Santa :: Replies: 8 :: Views: 1353
I encountered a weird problem in permanent magnetic DC motor control application. I used L6204(from ST) as my H-bridge driver for a 11 watt DC motor. I set up the typical circuit named "Enable Chopping". Using DSP PWM output to drive the H-bridge enable input, I just implemented a simple position feedback and used position error to command a PID un
Electronic Elementary Questions :: 07-12-2004 11:34 :: bittware :: Replies: 2 :: Views: 1718
Because the reality does not allow a zero delay these buffers are using a PLL (phase lock(ed) loop) to achieve a ?zero? delay.
PLD, SPLD, GAL, CPLD, FPGA Design :: 09-07-2004 08:30 :: cube007 :: Replies: 5 :: Views: 1536
Hi, some one said Sub-Harmonic mixer is better practical solution for zero-if architecture? Is it true? Any comments?
RF, Microwave, Antennas and Optics :: 09-24-2004 10:08 :: dd2001 :: Replies: 2 :: Views: 709
You can make zero crossing detection many in ways, such as Optoisolate that include zero-crossing output pin, use NPN transistor get un-filtered signal that come from bridge rectified, etc. But in my opinion I think cozturk's idea is suitable for your demand.
BTW you have to know before that inside PIC'port structure they have diode
Hobby Circuits and Small Projects Problems :: 10-02-2004 05:02 :: Taro :: Replies: 11 :: Views: 5308
You have two choices. One is to do the classical two port synthesis and end up with a ladder network for example. The other, simpler way is to have a cascade of ideal voltage controlled voltage sources with one RLC network between each one. This way you can more easily use each RLC network to produce just one pole or one zero. This makes the ma
Electronic Elementary Questions :: 10-06-2004 12:44 :: flatulent :: Replies: 1 :: Views: 1151
Just use triac output driver, like MOC3082 and any suitable triac, for example BT139. You will need just one pin for output - the whole zero-crossing functionality will be provided by MOC.
Analog Circuit Design :: 10-08-2004 14:35 :: Ace-X :: Replies: 1 :: Views: 1520
Here are some more examples on zero-crossing detector.
The first one is very sensitive (based on 393) but for 50-60Hz you will need to increase value of the input cap...
Microcontrollers :: 11-29-2004 20:28 :: IanP :: Replies: 4 :: Views: 1555
The spectre simulator of Cadence have the pole and zero analysis in the analysis type .
Only recent versions have this option .....after ic5.033 version .
Analog IC Design and Layout :: 01-04-2005 02:28 :: Sergiu_Q :: Replies: 15 :: Views: 2305
have the ADS software support Pole-zero and transfer function simulation .......
Software Problems, Hints and Reviews :: 12-26-2004 06:54 :: tavakoli :: Replies: 0 :: Views: 915
I am developing a USB Mass Storage Device using the USBN9603 and PIC.
I have a question regarding the USBN9603.
What should I do exactly when I receive a zero length packet from the host?
Should I read again the status register or not?
Yes, you should. The very fact that you asked this question is probably because you
PC Programming and Interfacing :: 01-12-2005 13:08 :: checkmate :: Replies: 3 :: Views: 1191
in single power supply CMOS asic , how to detect "zero volt"
zero cross circuit need it ..
Analog Circuit Design :: 01-17-2005 03:49 :: andy2000a :: Replies: 7 :: Views: 1721
The main characteristics of a digital filter can be seen from a wiew to its zero-pole location, as in an analog filter. In an analog filter, the frequency axis (location of complex exponential signals) is the immaginary axis of the s-plane, while in the digital filter it is the unit circle of the z-plane.
For visualize the transf
Digital Signal Processing :: 01-21-2005 11:45 :: zorro :: Replies: 2 :: Views: 3672
>> help find
FIND Find indices of nonzero elements.
I = FIND(X) returns the indices of the vector X that are
non-zero. For example, I = FIND(A>100), returns the indices
of A where A is greater than 100. See RELOP.
= FIND(X) returns the row and column indices of
the nonzero entries in the matrix X. Thi
Electronic Elementary Questions :: 01-23-2005 20:54 :: me2please :: Replies: 3 :: Views: 7455
Hello everyones !
I'm a new member on this forum. I come from Vietnam as a electronics engineer.
I've tried to design a RTOS kernels on 89c52 with 8KB ext RAM. It just the way to learn Real-time Linux.
My evalution board consist a 89c52 with 8K RAM (6264) at 0x8000. There are 16 task in my design, each task has a 256 bytes external memory.
Embedded Systems and Real-Time OS :: 02-15-2005 05:09 :: opentdoors :: Replies: 16 :: Views: 6257
Definately, you can set up the initial condition. Usually the circuit which needs a start up has two stable operating conditions, one at zero volts and the other at the normal voltage at which the circuit operates. Hence, the start up is used to push the circuit to the second stable operating condition by pumping the required current. So, you can
Analog Circuit Design :: 02-18-2005 02:57 :: Vamsi Mocherla :: Replies: 8 :: Views: 1076
How to do the pole-zero anylysis of Telescopic Cascade op amp as shown?
Analog Circuit Design :: 02-25-2005 05:39 :: Alles Gute :: Replies: 17 :: Views: 2336
or in your layout you might want to replace that part with a finite resistor, so you put in a zero resistor instead of just drawing a trace. makes life easier to modify the circuit later in testing etc.
Analog Circuit Design :: 03-24-2005 12:35 :: wwfieee :: Replies: 6 :: Views: 1200
the poles determine the intrinsic form of the systems response.
the zeros determine the effect of each pole on the form of systems responce.
for example if a zero be close enough to a pole we can neglect that pole(only for left hand poles and zeros)
the poles must be in the left side of jω axis because the right hand poles (...)
Analog Circuit Design :: 03-27-2005 01:37 :: is_razi :: Replies: 13 :: Views: 2402