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9 Threads found on edaboard.com: 12bits Adc
So I have been looking for way to send multiple analog signals through a Fiber Optic (FO) link. I need to have a sampling >= 10 MHz and >= 12bits of precision. I was told that a serial output adc and serial input DAC is the most FO friendly way of going about this. Just to make sure this is similar to using say a microcontroller to multiplex mul
hello, see microchip with 12bits adc so you will get 1mV of resolution to get deeper resolution use external adc 16 or 18... bits
Thanks Shan. There is no adc inside the FPGA, you can integrate it with the FPGA and then transfer data from adc to FPGA. (I haven't done this yet so I cannot assist more on this :) any ways good luck. To communicate you use ports, they are usually type bit or std_logic if you are using VHDL and if u
Hi all: During designing the Pipeline adc, the capacitor is the key component to the MDAC. So I beg help from this BBS and want to know How to calualte the capacitor size when design pipeline adc? For example, when I design a 12bits Pipelineadc, The capacitor size for the MDAC is selected to be 50fF based on our (...)
Hello there, I have 4 analog outputs (2 * IQ) from a dual IQ demodulator. These signals are filtered and fed to a quad 12bits adc. The output of the adc should be through SPI communication to a Microcontroller. My question is what are the pros and cons of using : - a quad adc - 2 dual adcs. thanks
Hi New to the site. Has anyone designed with the NatSemi adc12048 12bits + sign adc. I am having some difficulties getting it to function correctly and find that the Data Sheet is not providing me with the answers. Yes, I have been in contact with National Semiconductor but I am not getting a good response from them. There seems to be a (...)
Hi~~ If said a adc has 12bits,then the reference voltage = 2V then the smallest can measured voltage = 2/(2^12) = 4.88mV (it means LSB) , and if reference voltage = 1 V --> 1/(2^12) = 2.44mV , so the reference voltage =1 can measure smaller voltage if adc's bit =12 Is this statement is right? thanks~~~ Take
Understand the defination of DNL/INL then you can begin to simulate it. Do you know how to evaluate the DNL/INL of an actual adc? SNR is calculated after FFT analyse using Hspice. Dear All, How to simulate INL , DNL , SNR by Hspice . When I do Histogram analysis,it needs many cycle. If I design 12bits adc,it needs a lot of time
For a 12bits adc,how to determin the gain and accurate of the OP?