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Hi, I have designed an adc in cadence virtuoso and i want to calculate the metrics such as SNR,SINAD,ENOB etc. For example i want to calculate ENOB. I read everywhere that i need to do an fft my input, or simply use the spectrumMeas function. So i am using a sinuid input of 875MHz as fin and 2GHz as flck. In the field in (...)

## how to find the phase of the signal in fft??

Are you analysing a real signal sampled with an adc, or a simulated one? If sampling is not synchronized with the signal, then the phase is random.

## Sigma Delta ADC FFT simulation setup

Hello, I've read around extensively about fft setup for a sigma delta adc and I'm not sure if I'm not setting it up properly . my current setup for a first order sigma delta adc sampling frequency : 38.4 kHz (for the adc and fft setup) fft bins : (...)

## spectrum leakage in FFT analysis of 14bit SAR ADC

Hi all, I am now designing a 14bit SAR adc, at present, I have designed a prototype with ideal comp and sh. I run transient analysis with stop time 1s (10kS/s sampling rate), around 10000 samples, then I perform fft analysis in MATLAB with window functions like hanning. However, large spectrum leakage appears and (...)

I wanna measure my SAR adc's ENOB using Cadence 6.14 can i know the exact steps ?

## Fit with xmega, with band width 100k to 200k and sampling rate of ADC equal to 1Mhz

hi my freinds fft with xmega with band with 100k to 200k and sampling rate of adc equal 1Mhz. is it posibble?

## how to detect frequency changing with adc

- - - Updated - - - this is my project: clock of adc is 1MHZ and my controller use external osc with 8Mhz frequency.i want to write one code like it . i wanted to chek it with some signal in input. when u give it a signal with constant frequency it code

hello everyone, how to connect adc block in the matlab simulink ??? , i want to connect sine wave genrator to adc and then fft and scope, im a beginner at matlab simulink , kindly help me, btw connecting sine wave generator to adc is not happening ,how to do that??? - - - Updated - - - the (...)

I am designing a 3rd order Sigma Delta adc, with 1.5 bit comparator, i modeled the system using ideal components and the system worked as expected. Now, i inserted the comparator i designed (CMOS Comparator), while simulating , i got confusing results When i simulate and calculate the fft (or DFT) using 4096 points, the (...)

## Characterization of a first order sigma delta ADC

Hi All, This is my first adc and verifying it is proving to be more difficult then actually designing the subblock. I have been able to do a transient simulation in cadence (spectre) and have successfully imported the data into matlab. This is where I'm encountering most of my headache. 1) I'm new at matlab 2)All of the (...)

## How to choose sampling rate?

I am working on a FMCW radar and I want to sample the I/Q signals from the 2 receiving antenna (total 4 channels) simultaneoulsy and send the digital data to computer to extract range and velocity information using fft. The below diagram is a overall plan. 111498 In the diagram I have shown a adc with (...)

## FPGA based Spectrum analyser

Hi; I'm doing a project for spectrum analyzer; i did analog parts ( now i have 0-100 Mhz analog signal ready for sampling). I wanna show the spectrum in a LCD( i had wrote the code for that in last). My Question is that : am i have to convert it to Digital and then take an fft from it and then send the data to LCD??????? if (...)

## FFT input format for dsPIC30F

Hi! I have one question about reading adc value as fft input. I'm using dspIC30F. I found the following definition of the fft input as given by the Microchip CE018 example. extern fractcomplex sigCmpx __attribute__ ((section (".ydata, data, ymemory"),aligned (NUMSAMP * 2 *2))) I'm not understand this part. I woul

## FFT for ADC output using dsPIC30F dsp library

Hi guys, I have one question related to fft computation in dsPIC30F4013. Below is the code I used (basically from example CE018 C30 compiler) but with input signal from adc pin. However, i got incorrect result. Please anybody could help me resolve this issue and check whether i make mistake in my code. I'm using MPLAB IDE (...)

## fft in 2nd nyquist zone

Hi, i am trying to use 3gsps adc of e2v's ev10as152a, the datasheet is claiming that this adc can give upto 5GHz bandwidth (better SFDR even in 2nd and 3rd Nyquist zones). but when i calculate fft for this digital data(after down sampling) i can only get Fs/2 bandwidth i.e i can only (...)

## Detection of frequency

You could do an fft. You would probably need an external adc for the frequencies you specify. Or, if you are looking for a particular frequency, you could just have an external BP filter and comparator.

## How to design the switch in PipeLine ADC?

Hi all: I am designing a 10bits 50MHz Pipelineadc, the common voltage is 1.65V, the possive reference voltage is 1.9V and the negative voltage is 1.4V. the wave of 1024 points fft is shown below: 92939 But there have some wrong with this circuit: 1, In the SampHold circuit, the output of SampHold circuit SHN and SHP. F

## Not getting the FFT of COMPARATOR

What do you mean? Comparators and adcs aren't supposed to suppress harmonics. An adc should have an anti-aliasing filter to remove anything in the input that is above the Nyquist frequency.

## SNR calculation of Delta Sigma ADC after Modulator and After Decimation

hello Eminent.Engineer, I hve also designed a delta sigma adc and i calculate the SNR order to caculate the SNR after the modulator you must make the fast fourier transform function (fft) by MATLAB after the modulator. About the decimation,until now i have designed the complete adc in Smulink (MATLAB) then by using (...)

## a problem with SNDR of a flip around SHA

Hi guys!I have designed a flip around SHA for a 10 bit 80 MHz pipelined adc, yet the fft analysis results are very bad, the peaks of the harmonics are very high and there's too much noise. I wonder if it's because I didn't use bootstrapped switches or it' the problem with my amp or anything else. I have attached some net lists (...)