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156484 PCB Solar Panel kit Monitor Box Hi All, I have a solar kit for camping that has a plug in monitor box. The wires to the PCB inside were soldered poorly and have come loose I am unable to work out what wire goes where. There is 4 wires Red, Black, White and Green and 4 soldered areas where the wires were
Hello. Well after the 3rd time getting hit at work, this last time was major damage... of course no one said anything. I suspect that the issue is parking. The parking lot is a crappy design. Anyways, I built a bull bar for the rear bumper (its a truck) but I need some type of proximity device that will cover the sides. Especially the rear quarter
Hello members, Which RTOS do you all suggest for STM32F429? Thanks in advance, Embedded Geek
Hi, The attached circuits provide an 8.3V rail which supplies approx. 10mA. The Left-hand version shows a diode D1, which is supposed to protect the NPN. Our contractor tells us that this is essential. However, though I don?t like over-reverse-voltaging NPN Vbe junctions, I find this diode D1 to be unnecessary in this case, do you agree?
hi everyone idesign this circuit to bosst voltage from 15v to 36v in no load condition everything is ok and output voltage is 36v but when i put 7 ohm load in output voltage drop to about 15.5 volt and current about 2.5 amp. where is problem?why voltage drop from 36 volt to 15.5 under load? i add 56k resistor beetwen pin3 & pin4 for slope comp
To test this GDT (2051-47-SM-RPLF) is OK, can we simply place it in series with 3k and put this across 100V?.......Assumedly, from the datasheet, this makes it glow, as the datasheet says glow current is 10mA at 70V? If it glows then its OK, we are thinking. Otherwise we will have to put 470V across it in series with a resistor 2051-47-
Hello everyone, I have used some RF test points to characterize the RF components of a S-band receiver prototype. The part numbers are: MS-156C3 for the RF test points; MS-156-HRMJ-H1 for the plug (the mate-connector). Since I would like to measure the S-parameters, I need to use a calibration kit for the network analyzer. My q
Have with few microntrollers. Trying to learn psoc technologies. What psoc is good to start with?. Considering the easiness to start learning the psoc and the low cost what is recommended?.
Hi, What are you talking about? You could talk about WINDOWS or LINUX, Android.. Or any other operating system.. Or you could talk about a cellular phone, scope or any other electronics equippment. Maybe the most probable: PC with WINDOWS. In this case there should be a button on your keyboard that tells the OS to store the screensot i
Hello, Has anyone used this NCSU kit for Analog Design ? Or is it mainly for digital design (standard cell flow). Thank you.
I am thinking(in fact worried about) a topic that I have no answer for. That's why, I am posting here, and inviting international intelligentsia to come and share views. First my background: I am an ASIC designer who has just started my career in ASIC design industry. I am doing codes in Verilog and trying to learn to verify them using Systemver
Hi to all! Help me please to solve a problem during simulation a model of MRF 13750 in ADS. See attached file.
Dear all, I'm facing a problem with a post-pnr simulation that I hope you can help me figure out. The design flow is based on the GPDK045 kit from Cadence. I use Genus & Innovus for synthesis & pnr, Modelsim for simulations, and I have compiled the standard cell library with modelsim for gate-level simulations. Post-synthesis, my timing co
Dear all, I am having a problem with a post-pnr simulation that I hope you can help me figure out. The design flow relies on the GPDK045 kit from Cadence. I use Genus & Innovus for synthesis & pnr, and Modelsim for simulations. I have compiled the standard cells with Modelsim for gate level simulations. Post-synthesis the timing constraint
Yes. You have to create your own level converter - if the ams lib doesn't offer one.
I am having my project requirement to sample the analog data at the rate of 2 Mega samples per second streaming data and send to the PC. I am thinking to use PIC starter kit with USB or Ethernet with demo software for PC side to receive and download the PIC data. I just look at some Microchip starter kits but I am not sure I can use them for my app
Dear all, I have verilog block for which i have created symbol. I tried to test only that block performing ams simulation and it works. Now i try to put it the actual design and perform ams simulation. It gives the following error. Please help me understand this. Running netlist assembly.. ncvlog: *E,BADBSE (...)
Dear all, I have a verilog code with input in and output out. When i try to create a symbol for it for ams simulation, it gives me only 2 pins. One pin for input, in<3:0> instead of 4 pins as in, in, in, in. The other is for output, out<3:0> instead of 4 pins. I am really not sure of how to give the inputs to this? AM i missi
Let's say following Yocto project image or embedded linux distribution was created by using remote virtual linux box from windows computer: Image Name: fsl-image-validation-imx Target: Builds an image with a GUI without any Qt content. Please refer to section 5.2 in attached i.MX_Yocto_Project_User's_Guide.pdf The created filename
Hello all, I am unable to simulate D-flipflop properly in ams. The input that i am giving is itself shown incorrect on the wave form window. I was able to simulate simple gates but find ing problems with D flip flop. Attaching the code and waveform. module DFF_VERI(D,clk,Q); input D; // Data input input clk; // clock input output reg