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22 Threads found on edaboard.com: Area Group
electrical tilt is preferred over mechanical tilt as ET causes regular and uniform changes in its pattern. Also remember this summary: With the mechanical tilt, the coverage area is reduced in central direction, but the coverage area in side directions are increased. With the electrical tilt, the coverage area suffers a uniform reduction (...)
Hai Can you explain the application of multicast addressing in a simple Local area network which contains multiple windows xp machines and ethernet switch . How can I enable multicasting in xp machine ? how can I assign a multicast address for a machine and how a machine join in a multicast group ? And finally how can I use the multicas
The link I have provided is more than a group of people searching for libraries, they have libraries you can download in the download area. I guess the alternative is to buy libraries but I don't have any company links available.
can anybody tell me what is the meaning of compression in defining the area group with syntax area_group?groupname?COMPRESSION=percent;
I think all these things can be shared in a common place where it is accessible to all.. people wont look into verilog group if they need it in the controller area.... people of controller section or others may not be aware of such a thing if moved to a specific category......
pleas mention your specified area
Micro Electro Mechanical Systems (MEMS) is an area of significant research potential. Hope you find these links useful! MWLab-ECE-IISc-REsearch areas-RF MEMS Also GE Global Research (also known as JFWTC) at Bangalore has a MEMS Design group. Institute for Smart Structures and Systems (
our design is to divide the area to many groups consists of four lots ... * every group contain RFID Please clear Each group is having four parking lot.. and each parking lot is having RFID Reader or Between four Parking lot there is only one reader.. i think you are saying each group that is one RFID (...)
there are 3 set standard cell in my project, each set has different power supply voltage,i have a problem below 1. i can group each of them in different area, but in fixed timing stage astro will insert cell in the netlist, wrong std cell will be insert in wrong power plan. how can i define different set std cell in different (...)
Hi everyone, I wannt to make a group about VLSI lowpower design. Does anyone interested in these area? or if you also like to discussion topic about VLSI lowpower design, or have a Preference of manage such a group, welcome to connect with me. I'm a digital IC engineer, have a 3 years experience of digital SOC design. and I will have some (...)
In LinkedIn, We have created an area where Wireline/Wired Communication IC designers can exchange their great ideas, sharp comments and versatile interests. This is a group where professionals in this area can know each other and build a network mutually beneficial. Search for "Wireline Communication IC Professionals" in LinkedIn (...)
Hi to all the group users. I am doing research in area of Incremental delta sigma modulation techniques and A/D conversions. I am looking for text book for detailed study of incremental delta sigma theory and related development. A good thesis report in that area will also help. Please suggest. regards shantanu
Hi a.akbari61 Latch up is one of the reason for substrate connection. You can always get the substrate contacts after pcell is generated from properties. In general we prefer having substrate ring for a group of transistors than having individual connections for every transistor. It saves lot of area. Also we can enable option of getting bo
Hi! We are small group from Poland specialized in Hardware and Software design in microcontrollers such as :ARM/AVR/MSP430. We can offer professional prototype devices design in any electronics area. I you have any questions or projects ideas please contact us.
Hi to all the group users. I am doing research in area of Incremental delta sigma modulation techniques and A/D conversions. I am looking for text book for detailed study of incremental delta sigma theory and related development. A good thesis report in that area will also help. Please suggest. regards shantanu
Hi syed, there are many examples attached in this yahoo group for your request. I hope it will help you. you must be a member firstly then you can see every thing, you will find in the file area many files attached (thesis) containing a matlab code for the OFDM. Thanks
i want to use floorplanner to constrain my design by using area group constraint, and i want to follow the signal flow to assign my module in different place, now the problem i am encounting is that i found the right edge of floor planner didn't have pin number(pin location information). i think in ASIC design, all four edge of fpga should have pin
Hi, all, is clock sampling with over sampling rate externally controllable for sigma delta ADCs? I am working in a testing and reliability group in mixed-signal area. I am trying to use the same input signal (ie. sinusoidal signal) to the sigma delta model with different over sampling rates. I wonder that one sigmal delta modulator can ha
the BPF in microstrip have many implementations , like hairpin , edge coupled , side coupled , interdigital and so on , it will depend on ur frequency , the board area , u need to know the S paramter , the insersion loss , and the group delay of the filter
on what area/field in com. u r interested most?