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Asic Verification Interview

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7 Threads found on edaboard.com: Asic Verification Interview
hi, I will be having a phone interview with intel for the poistion asic verification engineer. i am a fresh grad. Could you pls give me some ideas about what kind of question they will be asking me? Thanks
I think the interview meant to say the reference model instead of the BFM, which is suppose to predict the expected result out of the DUT. Two ways we can detect this problem. One is with code review and the other is to check the intent in the test itself and not completely rely on the reference model. For example, if the DUT is suppose to dro
Hello, I am looking for Question bank (along with answers) of FPGA. This is required for answering job interview questions. Pls help me. If any has such document for FPGA/asic/CPLD/VHDL/Verilog/verification, Please let me know the link to download or mail me to viswanatham1981@gmail.com Thanks, Vishwa
Hi all, Can anyone share some question and answers for asic-fpga design interview or any questions/answers for digital design. I tried looking in this forum but most of the topics point to the same 10-20 question in the internet. Is there any standard document which you could share ? I would really appreciate your help regarding this.
Hi Veriguru, I think as a fresh graduate, it is not much use to prepare yourself to answer technical question related to the requirement of the job. I think it is more important to demostrate a good understand and interest in the projects and subjects you had done in the school. Of course, this also depend on how experience is the interviewers.
Hi all, i've very humble request for all of you. ...actually i'm an asic/FPGA Design verification engineer and i have an interview with a company which does PCB/Board designs....I would really appreciate if anyone can give me what sort of questions are asked in interview related to PCB/Boeard Design. I dont have any (...)
also for asic verification, pls