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61 Threads found on edaboard.com: Bandgap Startup
Hi Guys, I have a concern on the bandgap start up circuit design. I understand the need of a start up circuit in the bandgap design. But I'm not very sure, or need your feedback on the simulation outcome that Im observing. With the startup circuit added, the bandgap core output voltage is able to settle around 150us when (...)
This is your fundamental "box" for designing startup circuits. The startup current needs to be large enough to boot the loop in the worst case, and it needs to be low enough to not bother the loop setpoint in the "best" case. PVT can make this a thread-the-needle exercise especially if you want to stay simple (like diode-steered resistor pullup)
I would suspect that the Schmitt threshold is too close, but on the wrong side of, the bandgap output voltage and yet the startup circuit cannot be removed without the bandgap core collapsing. The startup looks too simple to me. Start with breaking that feedback loop and see where the startup can be removed (...)
You could start with just what "didn't work" means. A result you didn't like, or failure to produce a result at all? bandgap / PTAT loops without explicit startup mechanisms, can easily converge in one testbench and fail in another, because when they start up they're doing so on "numerical noise" which depends on the circuit matrix and algorithm
Hi all, I am designing a bandgap reference circuit, which i have tested using Cadence Spectre. The circuit works well and converges to the designed operating point without a startup circuit, which wont be the case, when fabricated. The problem now is, if i design a startup circuit, i dont know how to test its working, as the circuit without (...)
The problem with all capacitive-based startup circuits is that it's not robust. You may have to simulate not only slow startups, but also brownout conditions. It may give a lot of headache if you have very strict criteria on your bandgap startup.
Hi Guys: I am working on a bandgap circuit for a internal regulator in a DC-DC converter. The core circuit is a simple BROKAW bandgap circuit and i need a startup circuit for it.The problem is the input voltage is from 5~23 and the high voltage MOSFET my process provide have a max Gate-Source voltage(Vgs) of 5,while the max (...)
Hi Friends I am designing a bandgap reference circuit in .18um process shown in figgure. my objective is to get a stable output voltage with least temco as possible when i simulated my bandgap i got 1.125v as the voltage which has least temp co but usually 1.25v is the desired bandgap voltage if i set my output voltage to 1.25v my temp co (...)
Some bandgap structure will have three operating points.
Will the bandgap ref work well if I add 2 cap and 2 res in the circuit? startup without any problem? stability for work?
Hi all, Could someone help me with the startup problem in my bandgap circuit? I have startup problem for lower temperatures .i.e if i simulate ckt for weak -40. I get output waveform as attached .. Thanks in advance rampat
You are asking far too general a question. You really need to read some books on bandgap design. Bumping the same question won't get an answer. Keith.
Hi All, I have a bandgap reference circuit, which works fine in simulation. (Both DC temperature sweep and transient sweep give satisfactory results.) As this is my first fabrication, I am a bit concerned about the start-up and also the stability of the circuits. startup the startup circuit I used is the one based on capacitor. (...)
Unless you have an explicit spec on the bandgap start-up time, it can take several microseconds. Faster is not necessarily better in this case. If you ramp up your suplly with a slower rate, you will see that the peaking will be lower. Moreover, keep in mind that a power supply usually ramps up in hundreds of nanosecond...
Hi For 1.5V supply I would not use the classical bandgap approach The classical approach will show some serious problems in the low-temp/slow corners, especially during startup ... Look out for some papers about low voltage bandgaps. The basic idea there is, that you add a ptat and an iptat current. THis current is injected into a (...)
please show your bandgap schemtic
You can move upwards in frequency the starting point of the rising slope by improving the bandwidth of the bandgap amplifier (assuming we are talking pnp-type bg) You can move downwards in frequency the peak of the psrr response by adding more capacitance to the output node Good luck
Hi this bandgap the startup circuit works fine untill I apply an offset (vos) to the opamp. With a positive offset, all it's ok but witha negative one the loop becomes open! Why does it happen? Any suggestion to avoid this bad behavior, please? TIA, CBs
Hello bharatsmile, Limitations of this startup that I can think of: 1. it is always on because when vdd is up, the diode connected nmos is going to have a vgs across it. The pmos connected to V- will have a high Vgs across it. 2. the bandgap voltage is going to have an error term because the startup pmos transistor has current that (...)
hi, would you pls suggest a startup circuit for Conventional BGR,which consumes less current(in nA) and improves the response of the bandgap? Thanks