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72 Threads found on edaboard.com: Bicmos Design
What is the max breakdown voltage for 0.35bicmos
Hi all, I am trying to design a Marchand balun (20GHz - 40GHz) using AWR Microwave Office. The process (PDK) that I am using is IHP 0.25um SiGe bicmos. My simple design is close to the required specifications though S11 is not matched for the center frequency (30GHz), it is currently matched for 38GHz. Also, the phase balance is around (...)
BJTs lack the fragile thin oxide of the gate. You can still do hot carrier type damage with an ESD event, and drift your front end out of offset spec or Iio/Iib, but you're not likely to see the functionality compromised. The reason for bicmos in that Unitrode part is, the op amp and reference especially are easier to design and work better (and
Hi, It's my first time to design circuit by using BJTs. I am doing a CML driver as below 108196 This is simply modified from CMOS CML circuits, but I found it doesn't work at this point, maybe due to the base current (ib) too large? but if I make the size larger to increase beta, the speed maybe affected. And it's
Does anybody knows about any commercially avaliable CFA (current feedback amplifier ) IC in CMOS technology ? The one's I know about are all in BJT or bicmos technologies like AD8001 , AD811 , LT1210 etc. Thanks Vipul
I have a task of designing an Up conversion mixer for cognitive radio using BJT SiGe bicmos Technoloy. I am new to ADS Mixer design. Helful tip on how to start, link of reference work or previous work will be highly appreciated.
Where can I find some resources with examples or tutorials that include RFIC laout examples to get started with IBM bicmos process using the Cadence design tools? My only experience has been with the schematic and circuit simulation. Thanks!
Hi.i need ihp 0.25um SiGe bicmos designkit.can any body help me?:cry:
Hi, Does anybody has any architectural schematic diagram or Paper on it. DDC manual doesnt provide much information about design details. Please, post it. If you have it. "A Single-Supply, Monolithic, MIL-STD-1553 Transceiver Implemented in bicmos Wafer Fabrication Technology " If you have this paper then please pass it. Thank You
Hello Every one, I want to design a analog mixer with 0.18um bicmos process. The mixer is used to be one module in the whole chip. One input signal of the mixer is a wide-band signal, for example , its bandwidth is 50MHz. The center frequency is variable between DC and 2GHz. The other input signal is a square wave whose maximum frequency is
Hi all, I am looking for an accurate model of HBT/Bipolar/bicmos(anything) with a ft greater than 200GHz. The simulation platform would be ADS. Please help. Thanks. Thank.
Hi, I am trying to design a high speed input buffers for my high performance ADC.I read that bicmos buffers are better than CMOS ones for this kind of applications. can anyone give me a good reference for this kind of buffers or advise me about using this kind of buffers in my design. using this buffers will force me to separate the (...)
I'm designing an opamp and need 78 dB gain and 4 GHz BW with 3.5 pF Cload and 2.5 V supply voltage. I can get the gain with a single stage folded-cascode opamp, but the best result for the BW is just 1.8 GHz. Would you please let me know your opinion about this design and any suggestions for the structure? I'm using bicmos process. Thank you.
You didn't provide enough info to get help. If this can be done depends on several details: Pure bipolar or bicmos process? Which device has to stand the 36V? BJT or MOSFET? Grounded or floating? Which current? If HV-MOSFET, how much voltage would be necessary between G-S resp. G-B? Does the foundry provide
1. when I use bicmos process to design a simple two stage amp, if bipolar as different input pair ,then small noise, large gm/Gain, any other..? if bipoalr as active load and second stage input , then what benefit for it??? 2. How to decided a OP Gain, GBW. For a OP used in BandGap, LDO, DC_DC ,..... how to choose the b
I am an electronics engineer with over 10 years experience in CMOS integrated circuits design and CMOS/bicmos IC layout design . If you need my services in IC layout design and PCB layout design please find more details at and don't hesitate to contact me.
Hi, I am located in Europe and looking for an analog/mixed IC design engineer position - Telecommuting or Freelance - Frequent travel is possible. EDA tools availability can be figured out. - 15 years strong experience in CMOS/bicmos IC design: PLLs, DLL, ADC/DAC, voltage regulators, AGC and control loops, switch cap, amplifiers, buffers, (...)
I'm going to design an output driver using a 0.35um tripple-well bicmos process. The supply voltage of this output driver is Vdd=3.3V, and Vss=0V. In really application, the Output pin could be accidentally connected to 16V (>3.3V) or -16V external unregulated battery. Customer's SPEC is that, not matter which of these two wrong connections happe
Hi I need to design an SPI MASTER (which sits in FPGA ) to communicate with the (16-Bit, 100 kSPS/200 kSPS bicmos AD977/AD977A)A/D Converter of analog devices. Can anyone tell me how to proceed? thank you
Hello all, I am designing a mixer and wanna use IBM SiGe bicmos transistor in my design. I downloaded a text file (t94h_7wl_4lm_am-params.txt) from MOSIS which also includes BSIM 3.1 parameters of this transistor for N and P type. My question at this point is how can I use this BSIM parameters at ADS? Do I have to enter whole parameters (...)