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54 Threads found on edaboard.com: Binary And Clock
Hi, I want to design a clock and data recovery circuit at 7gbps using 65nm technology. which cdr model is best to design? Is it the single loop or dual loop one? I need a phase frequency detector and i thought of designing binary detector. Please help me with it? and help me if there is any paper (...)
I have written a code to read text and to write the same text to the other text file and i want to convert each character read from the input text to an corresponding binary value. and the reading and writing text perfectly worked but the problem is it is showing only the value corresponding to the first (...)
Well, obviously you have to clock it, meaning a transient analysis. An input ramp is one method. A looped binary search, running an input offset variable, is another and potentially more efficient (especially if you can skip DC solution, and keep total simulation time short). With an input ramp, your accuracy depends on the (...)
thanks, but that generates periodic pulse, right? i want to generate random binary sequence
If you are Ok with hardware counters and a 10Mhz clock, you use 2 counters. A counter with a preset of binary value of one hundred and another counter which counts the clock cycles until =0 or the complement counting up to $ff if using a ripple cary out type. The clock is gated with the (...)
Rather than guess on a implementation solution without defining the real task, Define the real purpose, then what you tried and then ask for suggestions. i.e is this to synthesize a clock with a binary controlled range of sweep frequencies using 1 to 256 divide ratios then sweep frequencies with a fixed pulse width then sweep duty cycles (...)
You're always dividing by a power of 2. This is equivalent to right shifting in a binary arithmetic processor. Consider the following values of Y and resultant outputs: Y = 0, OUT = X / 1; X >> 0 Y = 1, OUT = X / 2; X >> 1 Y = 2, OUT = X / 4; X >> 2 Y = 3, OUT = X / 8; X >> 3 Y = Y, OUT = X / 2^Y; X >> Y (Recalling that X / POW( Y
Dear all my friends i make a digital 7 segment clock without rtc only timer0 ..... i can count the seconds minutes hours with no problem .... but this values is binary how can i display this values .... only hours and minutes at the display ... please help My program by assembly best regards MedTronic
hello i have a littel problem her could any one help i made a function to add and subtract binary and to test it i test it in a module the problem is that when i enter the number it calculate it in the next clock or after two or three clock can any one solve this problem module addsub11( input (...)
I am trying to set up a a 4-bit binary counter to rest at count ten. Since I didn't have LS390' I had to create a condition rest clock made from an and gate chip. First I used one gate to get triggered when Qc and Qa where active. However when I do this it only
Config each DFF as a divide by 2 - i.e. connect Q/ to D and input clock to CLK. Now connect them in series - Q1 - CLK2, Q2-CLK3, .... and so on. and there you are !! A 4 bit binary counter
A counter accepts incoming pulses and sends a binary representation of the value to the output pins. If you mean that it is one chip with 16 terminals (or two chips with 8 each)... Then one way to test it would be to put an LED on each pin, and watch for the characteristic binary counting pattern. Another way would be to (...)
You can synthesize a sine wave with a parallel DAC from a square wave synth running at 2^N faster clock rate and using N bits to convert parallel output from a counter to a DAC to get a fixed output. Similarily you can use a crude 8 bit johnson counter with 8 Sine weighted resistors for a 3 bit resolution or use binary counter with (...)
Hi, I think johnson counter are used for clock dividing, because they are faster, because we do not need much logic for this. At least compared to a binary counter. e.g. for dividing by four you just need 2 FF and an inverter. If the FF would have an inverting output you do only need the two FF and loop the output of one FF (...)
In digital domain, there is no envelope concept. The vector as binary stream was no meaning of analog voltage. It can be anything before you define the analog information. Some important things related to analog, is Digital-Analog Converter 's sampling clock, Scale (or mapping of bit). After the DAC,the envelope appeared as multiply baseband (...)
Below is the code for a 3-digit BCD-Counter (binary Coded Decimal) I implemented while studying Verilog. You have to change the compare values (I commented on the code) to make it count like a clock (i.e. up to 60 instead of 100) and you can also add more digits for a full scale clock. You can access the driver for the lcd (...)
Using a counter does not sound too simple at all. However it can be done for example by having a gated counter and a sift register controlling the gated counter. Also, a sequential control logic would be required to steer the process.. That would then count the bits during 8 clock cycles. However, I am pretty sure it will be quite complicated machi
It is a project of binary clock in stationary version. The clock operates in 24-hours mode. From the top: hours, minutes and seconds. In the hours row one diode is unnecessary, because 23 in binary system takes 5 pos
Constant current into and out of a capacitor. If your SOC includes a DAC anyway, you could use it together with a (slow) clock and a binary counter, s. this posting!
This version of binary clock is based on LED matrix LINK , processor Attiny2313 and RTC DS1307. Everything except the matrix is in SMD technology. Schematic: