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Hello everyone, as a part of a course in analog circuits, I need to design a BJT amplifer with the following parameters: Voltage gain = 51 Rin = 55 Rout = 50 Band width: DC suppliers allowed: +/- 5V The purpose is to as less stages as possible. I thought about using two stages : of CB and CE or 2 stages of CB.
Dear, i will be grateful if anyone can send me the matlab code for using Method of Moment technique to find out s11, directivity and gain of dipole antenna. Thanx
Hi everyone, As part of the course i took in analog circuit i required to design an amplifier with these values: Rin= 52kohm Rout = 53 ohm A=35 gain in db F-3dblow = 400hz F-3dbhigh = 400khz M1= 40db/dec M2 = -20 db/dec Dc supply voltage are : +5 v , -5v Transitors are ntype BJT My idea was using a simple CE amplifier with 2 resis
I have a VCVS instance in my schematic design. I can't find VCVS in layout after generate from schematic because there is no VCVS PDK in Layout. How can solve this problem? Thanks. Attached is VCVS symbol in schematic.
Hello i am using the two stages amplifier shown bellow into the transimpedance feedback system shown bellow. if the system shown bellow i have miiler capacitor and feedback ressistor how do i break them into the system shown in the end? Thanks. 157371 157372
Hi guys, I have a schematic of OTA amplifier: 157362 I want to know the W and L that were used to design this OTA. I don't have more information other than the ones provided in this picture. since all transistors are in saturation, I thought about using the saturation current equation to find (W/L) ratio. by assuming
Hey guys, Please see the sketch of my circuit here. 157367 I want to do loop-gain analysis (a.k.a. loop stability analysis) for the top loop. In simulation I simply put a voltage source (i.e. VLG) in part of the feedback and run the LG analysis (ie. AC loop gain). My questi
Dea Forum Im designing a FIR filter, in this case a low pass. I get the coefficients from Matlab (no matter from where..) ,that are from 0 to 1, in floating point. Now, I want to implement this FIR in my FPGA ,with buil in 18x18 multiplier. So,I transform the coefficient in integer value of max 17 bit (1 bit for sign) ,multipling the big
Hi guys, I'm trying to design a transimpedance amplifier for optical receiver, based on this acrticle: the requirements: -VDDA=1.8V -Cload = 200fF (the output of the amp loaded by 200fF) -the total gain At=Vout/Ipd = 3000, (Ipd is the current source on the left on the schematic) -BW>2
Hi I have found this filter/amp combination, being simple with nice features. I wonder can I use other opamps like the ne5534 or is the performance specific to the 741 and will differ if using other opamps? Also how about Jfet based ones like the tl071?
Hi all, Could you recommend some key/good papers about static CMOS comparators (not dynamic ones)? Thank you very much.
Hello everyone. I have questions analyzing the diagram in the CST software. The 3 blue line we have the directivity, ok? In the circumference of red color we have the shape of the magnetic field (its formation), ok? Does the green circle represent the gain (S11)? 157327
Can the momentum simulation results be better than the simulation result of the schematic?
Hi all, Firstly, I'm a foundry process engineer, with very limited knowledge about circuit design. My question could be silly. Please kindly give me indications easier to understand. :-) I'm told that good process variation control can save chip size, but I don't really know the reason. I guess it could be associated with timing. For instance
I would like to design a dc booster for a solar system. System consists of 6x 265Wp panels in series, which equals roughly 1600Watts, 200V, 9 Amps. I need to boost the voltage up to 350V to feed into a VFD which in turn drives a 0.75kW motor. Is this possible? Where should I start? Thanks
: 157251 157250 how do I plot the Phase margin and gain of PLL? i'm trying to do an ac simulation but got confused what to put at the inputs and what s
I find out the answer from the thread following It use the technique boost converter . Vout = Vi/(1-D) So the my first post said about 7.5 volt which can be simply boosted up our desired value thanks
I was referring to the link for VCO. How does this circuit work?
The phase margin is 72 degree when the gain is 0dB. However, the phase margin is close to 0 before the frequency reaches the unity-gain bandwidth. Is the op-amp stable? Why? Thank you. 157193
Hi, I have a question regarding differential negative feedback circuit, addressed in Design of analog CMOS integrated circuits written by Razavi. On page 314 (Figure 9.30 (b)), Each output of an fully differential amplifier is shorted to the input of the amplifier to address the need for CMFB(Common mode feedback). (Resistor load is use