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Pages 8 and 12 of the FAN6300A datasheet explain that the primary peak current limit of the FAN6300A flyback controller reduces as the primary DC bus voltage increases. This is said to be done by the FAN6300A sensing the auxiliary coil voltage (via a potential divider) when the FET is ON. However, we had a Flyback (SMPS) power supply designe
For verification purpose i have connect my master controller to other system where i got the same issue. So you suspect the master controller is sending weak signal. In the CAN network most of the signal current pass through the bus termination resistors. So if you increase the value of the termination resistors then the signal v
Hello, I've implemented a Half Rate DDR3 controller on a Cyclone V FPGA. There're 32 DQ lines - so the internal bus width is 128 bits (for WRITEDATA as well as READDATA). The address width is 26 bits. Now, because the DDR3 holds only 32 bits (and not 128) in each cell - the cell address is 28 (and not 26) bits wide. So - when I issue a rea
Not sure if you understand the concept of dominant/recessive CAN bus state. A CAN node that is not transmitting is floating and does not load the bus. You can consider it physically off. If the question is referring to controller activity, just set it up to not responding.
I don't see the attachment and to be honest I don't know what a bus door controller is ;-) I can however give You a few hints on proper design procedures for EMC. Most important is a decent low impedance ground structure. For radiated fields provide a path where these disturbances can flow without upsetting your micro, place a (small) capacitor
Hi, I need to know what all error handling mechanisms in can protocol which can be handled. then what happens if send 2 message of same id in the bus ? you can explain with respect to any controller . thanking you in advance.
Arduino mega +ssd1963 Problem Hi all.. I have designed a custom PCB with ATmega2560 for my project. Have a 4.3 inch tft on it With SSD1963 controller (16bit data bus). All the data and control lines are translated to 3.3 logic With 74ahc541 buffers. The connection from my PCB to display module is via a 40pin flat ribbon Cable. Earlier I hav
Hi, the names on the CAN controller say RD and WR. These are control lines for parallel bus communication. --> These are no serial, no UART, no RxD, no TxD lines. Please refer to the SJA datasheet on how to communicate with the IC. Klaus
I would like to know whether it is possible to interface stm32f103vct6 with winstar display WF70Q using FSMC bus? I would like to print moving images on the display.the datasheet for both are attached. Also if it is possible to interface,which fsmc topology do we need to use?is it asynchronous non-multiplexed NOR write method? What is the ma
CAN is not very high speed, so normal I/O pins on the FPGA (GPIO) can be used, but the FPGA pins are not electrically compatible with the CAN bus. Each controller needs an external CAN transceiver. It is not a problem to fit 4 CAN controllers in an FPGA. Search for "SN65HVD230" on Aliexpress or Ebay and you will find many boards that will (...)
CAN is based on I2c with additional features. Never looked at it this way. I2C is a synchronous protocol involving a clock CAN is an asynchronous protocol The only similarity is the usage of dominant/recessive bus states.
Hi everyone Is there any free implementation of vme bus controller or master in the web? VHDL or verilog? I need vme bus controller for my PhD thesis.
i have 2 max 485 ic connected to 2 pic micro controllers one controller transmits and another receives half duplex communication, both the controllers operate from different power supply the ground is not common. my doubt is in the tx side i have one max 485 with a and b bus terminals, and rx side i have one max 485 with a (...)
Hello, We intend to use LNK564 offline flyback controller for a flyback that switches off the 380VDC PFC bus. It will supply a secondary of 5V, 200mA, and will have a 13V bias winding which gives some 100mA to the primary side circuitry. Do you think we can do this via secondary side optopcoupler/TL431 regulation? (The opto transistor would
L6566B is a switch mode controller, the HV input connecting directly to the DC bus capcitor is only used for ?A currents during startup. The power flow is in fact through a (high frequency) transformer. Reading the IC datasheet thoroughly would reveal this. Presuming you have little experience in circuit design and probably no tools to safely t
Hi everyone, I'm trying to figure out my expected throughput using this fast ethernet controller and having a conceptual problem more than anything the part claims to be able to support 100Mb/sec communicati
Hi guyz, I am trying to run i2c on Tiva C TM4C123GXL board. After Initiating the communication, controller is always busy and does not come back in idle state. I don't know why buti am pretty sure, it is not sending the data to 24C04 because in "Master bus Monitor" register i am seeing the SCL and SDA always low. I wasted my whole day to (...)
hi, i got some doubts while reading CAN protocol. Every CAN controller along a bus will try to detect errors within a message. If an error is found, the discovering node will transmit an Error Flag, thus destroying the bus traffic. in this which error flag will send by node who detect the error.(active/passive/any other) In n
Hello I am working on inverter. I have some problems going with it. Here is the code I am using. I am giving pulses from an ATMEGA162 Micro controller. I am working on hardware. Final Hardware will be driven by another series of micro controller. So I am not very good with this code. I am applying +DC bus of 30V Problems I am (...)
Hallo Everyone, Have you ever programmed using PMP address? I want to control LCD driver ILI9325 using PIC32 starter kit. It is controlled using 16 bit PMP bus Here is the code: #include /* PIC32 Main Library */ #include /* PIC32 Prepheral Lib */ #include #pragma config FPLL