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Hi guys. I'm using cadence virtuoso for the TSMC 28nm manufacture. and there weren't problem until I finished DRC and LVS test. but when I tried PEX, I faced over 150 warnings and couldn't extract any resistance or capacitance, these are my error pictures. and some of them are usual warnings I've had before( I didn't have any problem to PEX
Hello, 159680 I am playing around with a frequency doubler. For now the doubler is just a diode. The input frequency is 5.8 GHz and the doubled output is 11.6 GHz. The diode is terminated with an antenna whose resonant frequency is 11.6 GHz. A note about the filter, its pretty much ideal BPF, presenting a near open at f
#Spectre #cadence I was not able to get the pole frequency from DCop values of a simple circuit. I need to use the DCop values in order to verify my calculations used to govern my design process. This is also kind of required, or at least much welcomed in my thesis. Also knowing from where the performance limitation are coming from, has a huge v
Hello, I am trying to simulate antenna on CST studio, but instead of using the usual power sources (ports), I would like to use a circuit (Inductor, capacitance, current source). Is it possible for CST studio? Or on ADS? How? What would be a good software for that? Best regards,
Hello, I am trying to simulate antenna on CST studion but instead of using the usual power sources (ports), I would like to use a circuit (Inductor, capacitance, current source). Is it possible on CST studio? Or on ADS? What would be a good software for that? Best regards,
I usually use cadence Export with these settings. Produces decent images and if you zoom in for example in your power point presentation you can read device sizes even if circuit is big. 159663
Hi, I would like anyone interested in these topologies and/or with practical experience or knowledge of both SEPIC and Zeta to share their opinions. I read that SEPIC positives are that it is more efficient, has lower input ripple; negatives are two RHPZ, high output ripple. Zeta positives are no RHPZ (easier control loop compensation and hig
I have cooler master silent pro defected after thunderstorm, there is 330v DC on main big condensators, also 5v stendby present but all other dead. There is no power VCC to IC cm6806+X, (I think this is used for PFC) 10pins smd. There is also 8pin dip (pin6 missing) a6069h Any help,schematics or else will be welcome Thanks
hello, firstplan is simple. take some standard 12v refrigerator based on peltier cooling to have the box and upgrade it to lowest target temperature possible, until it makes sense to get small food freezer. lets start with this example
I was reading a section from a book that talks about class B amplifier. I don't quite understand what the author meant in the highlighted part. Can someone help me picture what the author is trying to convey? I know what full-wave and rectified signals are but I can't quite connect it to what the book is saying. 159613[ATT
Hello, Does anyone know what is rule of thumb for maximum current density on PCB tracks (Extracted from a DC Drop Analysis) ? I know for wires is usually 500A/cm2. How do I know if a local hotspot with 2000A/cm2 or 5000A/cm2 is bad or not. Thanks
I'm trying to create a univibe tyoe of guitar effect. That will consist of a timebase i.c. that will vary the sound to create a tremelo effect and various other phasing sounds. (Variable speed 1 to 30Hz) The trouble is I can't get it past the breadboard, although it works well enough I cannot avoid the sound of the I.C. switching, whether it be
I've been told that ICC2 supports OA cadence format techfile. I have an IP DEF file that was outputted using ICC2, and the designer provided a cadence OA techfile with it, even though he used ICC2 to write out the DEF. So my question is, how do I read this DEF back into ICC2 using the cadence OA techfile as an input? When I try to (...)
Hi, I have multiple modules in the product includes PSU and Mother board circuitry which are operating at different frequency. Mother board is not yet designed yet and will be designed by other Designer. I am designing PSU for the Same and Product should comply EN61000-6-3 which has Levels for Class B (AV) 0.15MHZ-0.5MHZ
Hi The complete panel has to comply with the EMC Standard EN61000-6-3. Panel includes power Supply and Mother board Circuit So what is margin we have to keep so we can pass both independently and into one panel. Limit for Class B (AV) 0.15-0.5MHZ-56dB to 46dB 0.5-5MHZ-46dB 5-30MHZ-50dB What would be new threshold levels
Hi All, I'm going to design an high speed HDI pcb - 18L 80mil thickness. I'm going to run 25G-KR, 10G-KR, PCIe Gen 4.0 (16MT/s). My trace length will be around 5-6 Inch to the backplane. The PCB material will be Isola I-Tera MT40 or Panasonic Megtron6. I'm not sure which PCB material will be the better for this design, the spec pretty
Hi , Can any one help understand the purpose of De Q'ing resistor? any links related to these are helpful. Thanks in advance vikram
Hi All, I need to get a steady voltage of 24V but the Vin can change between 18V and 32V- What could I use?
Hi all, i am new to HFSS software and i'm trying to simulate a ten port network. After i simulated it first time, i received all the s-parameters and i checked at fields->edit sources that only port 1 had excitation power amplitude of 1W and all the others had zero. From what i understood when i saw it, i thought that only port 1 should excite the
Hi all, I need something that I can use to shield a cable that seems to be affected by EMC noise. The cables are already fitted so I would need something that can cover the whole length of the cables. Anyone has an idea?. Thanks, Winsu.

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