Search Engine www.edaboard.com

Cadence Model Editor

Add Question

19 Threads found on edaboard.com: Cadence Model Editor
How can I make an inductor in cadence layout and simulate it ??? Do you have any guides ? 1) I know how to make inductor but I dont know how to simulate. 2) I am not talking about inductors in library. I want to make my own inductor. Thank you.
Hi i have the knowledge of creating a schematic and running analysis but now i have a verilog a file and i have no idea how to run it and observe the results. Currently i am only able to view the file. How can i get the symbol or results by running the verilog a code in cadence? Can anyone kindly let me know the way for it. Thanks a lot!!!
show us the verilog-a file, and how you put it in cadence?
Reference existing thread I am facing a similar problem. I want to model a cntfet in cadence using veriloga. I used the veriloga code ( ). I followed these steps to create the cntfet model- 1. I created a new veriloga cell vi
Hi, everyone: I have one problem during using verilogA editor to create one behavior model, the problem is : 1)when i create one transformer behavor model cell with verilog-A editor, the View is created but can't edit. The CIW message showed: "sh: gvim: command not found" ---What is reason? ---Can you give (...)
guys i want to integrate BSIM4 models to my orcad tool i choose BREAKOUT ==> MBREAK4 ==> right click ==> edit pspice mode PSPICE model editor opend with txt file .model Mbreakn NMOS do i copy my nmos section of BSIM4 model file here OR OR i clicked new model tab ==> (...)
I eventually want to run monte carlo. I know this could be done in HSPICE by synopsys, but I was wondering if it can be done in cadence schematic editor? Coz I think it will be easier for me to do it in tool which is already known rather than learning a new one!
is there any way to generate two different model name for one NMOS symble in cadence schematic editor on the basis of two different case. such as, when I run simulation, I take mn for NMOS, when I run layout LVS check, I take mni for model name. (mni for isolated nmos transistor, simulation model woulde (...)
Hi I'm importing gds in Ansoft Q3D Extractor and result it - 2d model. How do i get 3d model from gds file? Thanks for advance P.S. my tech file 1 sub green 0.0 0.35 1 diff green 0.35 0.004 2 poly red 1.0 0.2 3 vpa red 1.2 0.04 4 vpb red 2.0 0.55 5 mt1 blue 2.55 0.53 6 v1a blue1 3.0 0.65 7 v1b blue1 3.65 0.2 8 mt2 white 4.0
cadence Virtuoso offers a powerful design/simulation tool both for analog and digital ASIC design. yes you can design schematic via schematic editor, simulate via analog design environment or spectre circuit simulator. there are basc libraries you can find in it. but, for a realistic model you need to have a spice model of a (...)
Hi all, I just want to ask, is it possible to plot a model parameter. I want to plot vth (threshold voltage) of a transistor as i sweep input voltage. Thanks.
Hello everybody, Firstly, I use Spectre, mmsim-72, cadence 5.10.41. I have an interesting problem. I want to measure the drain current of a nMOSFET; however I get different results based on what I actually look at. Here is what I mean: 1. If I simply click to the drain terminal of the NMOS and plot the transient current, I get one value.
Hi I am trying to design a switched capacitor sampling system in virtuoso schematic editor. But I don't know how to: 1- Generate non-overlapping clocks. 2- How to model the switches? should I use like nfet or there are special switches? Thank you, M
No! cadence Virtuoso Layout editor doesn't have this feature. I know the only layout editor that has this capability: Tanner
Q1: Are the model files for MC simulation different than for parametric sweep ? Q2: For EG: I want to sweep Beta but in model files it is given a constant value i.e. bf= 250 if i write bf = BETA only then i can sweep it ! So, Can i edit the model files in text editor and name them differently to use them in parametric (...)
I have a problem with cadence. When I write a verilogA model, cadence doesn't seem to compile it automatically when I close the file. Can anyone help with this? Thanks in advance
Hi all, In cadence while designing, you just include the model file of the transistor in the working directory. How to do the same in Pspice? Like do u create a transistor by putting in all the parameters( say BSIM3) or can you reference it like in cadence. I think I must use the model editor to do it. Thanks.
yes, assura or dracula is ok. for creating symbol, best way is read openbook of the cadence on schematic editor.
annyone who can tell me how can i convert spice3 model to pspice9 model? i use pspice 9.21 in cadence PSD 14.0. Thanks a lot!!