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Hi guys, I would like to buy a development board to learn VHDL and Verilog, on a small target CPLD or FPGA. Could you advice to me a developement board based on Xilinx or Altera even Lattice chip. my budget is around 50?. I already have bought microcontroller based board on ebay. but as i am unemployed i don't have an account on distribu
Hi i use my ouwn Spartan-3AN board. this board is compatible with Spartan-3AN starter kit. I have problem with nor flash read and write. my architecture is like attached picture. also my ucf file is like this: 146565 146566 NET "NOR_FLASH_Mem_A_pin<10>" LOC= "F16" | IOSTANDARD= L
Hi i use my ouwn Spartan-3AN board. this board is compatible with Spartan-3AN starter kit. I have problem with nor flash read and write. my architecture is like attached picture. also my ucf file is like this: 146565 146566 NET "NOR_FLASH_Mem_A_pin<10>" LOC= "F16" | IOSTANDARD= L
Hi all, After doing some layout, I found out that the delay increase is 50%. I am getting a 6ps input-to-output delay in prelayout simulation, but getting more than 9ps delay in the postlayout simulation. The C-parasitic capacitance (between ground node and substrate) is so huge (in the 0.5fF range for some nodes) even though I am doing the layo
As ads-ee mentioned, the 12 bit unsigned number represents already the process value and don't necessarily need to be converted. Conversion to engineering units with defined scaling is however a possible operation, for example integer millibar or 0.1 C, also gain and zero adjustment ("calibration") of measurement values. If you start with practi
Hi, If THRU defines reference plane in TRL then what is the requirement of line ? i know the calculations i only want to know the physical significance. Regards Avijit
In such measurements "In-Line calibration" is that, calibration reference should be in-line with inductor reference. the second thing, I guess the internal connections of the MOS transistors present more inductor/resistor so MOS transistors don't provide a ideal short circuit internally. Since you don't know these internal connections,
As stated, you need a signal source, and two KNOWN gain antenna standards. You set up your test with the gain standard antennas, sweep the frequency, record the results, and that is your "calibration". You then replace one of the gain standards with your device under test, and can figure out the gain vs. frequency and angle. Many spectrum anal
Hello, I would like to make transmission lines in my TSMC65nm CMOS kit - it is a digital process and has no modeling transmission line elements. How can I go about this - I have never done this before. I want to use the top 3 metals (RF metals) for the interconnect and ground. Does anyone have screen captures, papers, or other resources o
I am planning to purchase some of sensors because if i buy separate then I get it costly. Is it good idea to buy whole sensor kit so that I can save money
The 1/Vbase factor designates a variable scaling in the design, no calculation to be performed by the processor, I think. Presume Vdc is variable and thus will be measured. As any other variable, it need a useful scaling to fit the used fixed point range. Your Vdc scaling may be different from the original ADC range, in this case it will be usually
Hi, Currently I am working on STM32F407 discovery kit using Atollic True Studio IDE. I have tried to configure the I2C peripheral in STM32F407 discovery board and used the I2C library available in the Peripheral libraries. The problem is Busy status Flag is always Set before sending the START condition. How to free the busy status flag.Kin
well i guess i can understand that. The VNA's cost between $20K and $250K, and to test an amplifier you have to DC bias it up. If DC leaks out, it can destroy the VNA. If you do not know how to handle the connectors and calibration kit, you also can destroy them. If i were a home build sort of guy, i would get a VCO in the right frequency range
I am trying to create a stub in Eagle on the board design, but I do not know what function to click on in order for me to create a stub. I thought for a sec that Via's function would short the circuit, but not sure if this would work? Plus, wouldn't the shape of the stub have to matter? How would I perform an accurate 50 ohm stub? Im working at 2 G
Hello, I am interested in abutting transistors in the TSMC 65nm CMOS process kit, like it is possible to do in IBM/Global Foundries CMOS kits for the purposes of interdigitating transistors for matching purposes. I cannot seem to get it to work properly, is this a bug in the kit or am I doing something wrong. Thanks.
Im looking for a simple yet rather accurate circuit to measure ambient rf power. This circuit should be 100Mhz - 6Ghz. IIRC a precision rf diode fed with just around of potential to overcome its particular semi conducting voltage threshold will output on the order of microwatts if coupled to a wideband arial. Im likely going to build a mini equiang
Is anyone familiar with this? I am trying to get this working with 2 x electret microphone attached to PCB connectors 2 & 3. I have added 2 wires to the positive supply pin, connected the end of these to 2 x 27k resistors and then connected the other end of these to the positive of the positive of the PCB connectors. This gives me about 6V on th
Capacitor banks are used to calibrate the VCO while the system is powered on.Because every die has some variations from nominal value of semiconductor order to compensate these variations and to standardize the products, a calibration routine runs at the beginning of start-up.Also frequency drift occurs by temperature and aging , capacit
Would ADS FEM and HFSS be okay since they use the same method to solve? You mention ADS FEM, the finite element solver. If your coupler has a planar bridge (no bond wire), I would not use ADS FEM or HFSS for this. They are general 3D solvers and can be used, but require a skilled user to get good results for
Like other RF spectrum analyzers, RSA503 has lower frequency limit of 9 kHz. If you really don't want to know about 1/f noise corner and respective noise level, the instrument can be used. Most people would use a FFT analyzer instead. If the DUT has some gain, no additional LNA required. A signal generator and attenuator for gain calibration sho