Search Engine www.edaboard.com

Cascade Sigma Delta Modulator

Add Question

4 Threads found on edaboard.com: Cascade Sigma Delta Modulator
Do you mean Modified CIFF-IF (cascade of Integrators with Weighted FeedForward Summation and Input FeedForward) ?
Hello, I want to design 2-2 cascade delta sigma modulator for 2 mhz signal bandwidth, i must sum the two outputs given by the two stages, i use ORCAD PSPICE for similation, i need to implement H(z) =z^-1 which is a delay unit, i don't know the structure of this function using MOS transistors and how i implement it. Please (...)
dear all, does anybody know how I can extract the first stage quantization noise and fedd it into the second stage in hspice? any paper or article?
i simulated sigma-delta modulator in matlab.i am getting same SNR for single stage and cascade stage.can anybody tell me,what may be the problem.i am trying in SD toolbox.


Last searching phrases:

nor not | and nor | and nor | asking for help | mean well | forth | seven | seven | and nor | cant get