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8 Threads found on Cdr Papers
HI guys, I have studies cdr for a several weeks and have read some paper. I am confused about cdr's specifications or index. In the end of paper, some papers talk about jitter tolerance(JTOL), and somes discuss about recovery data jitter and recovery clock jitter. I wanna to ask what is the relationship between JTOL and recovery data (...)
hi fpga_asic_designer thanks, Ok my specs are BER of 10e-12, 0.4UI of jitter. Can you tell me how was your cdr? was it having any frequency correction? apart from phase? Thanks
SA, there is the Optical communication book by Razavi for cdr design and concepts , then i think u should refer to the papers by Broadcom and TI and many other companies like Xilinix,etc
could you introduce some books and papers which deal with cdr by the numbers?
monkeylovemusic take a look on these documents:
hi all i just want to design a 2.5Gbps cdr. i want to make the power consumption as low as possible. any idea of that? i read some books and papers, and find the recent papers are on 10G and 40G. most are quadrature or half-rate. i want to know which kind of topology a company may choose. many thanks.
Dear Sirs: I have designed the frequency synthesizer before. But, this is my fist time designing cdr. Which text book is suitable for designing cdr. Thanks a lot. BR. purefen
This might help if you want to design cdr.