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3 Threads found on edaboard.com: Clock Buses
Hello, could someone tell me if there is a EMI problem to expect with this 8051 circuit layout ? It runs at 6MHz clock and the buses should run at 500kHz. I messed the placing of the decoupling capacitor at the 8051 cpu, i think it should have been above the CPU and connected via a top layer strip to GND under the CPU. At its current positio
HI guys, I am very new in PC platform, Hopefully you can help on the following questions: 1. What is the function of clock in PC platform? 2. Whats the importance? 3. For each buses there is a clock, why different? 4.What generate the clocks, are they in the came form the same source, if yes how do they distribute (...)
hi in my board, the emi question of the clock is very obviously, the radiate of the clock is very large. how can I deal with the clock trace in pcb layout to avoiding the clock EMI? thanks. Please specify how you determine the EMI is came from clock. I wonder that someone always ignore the (...)