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43 Threads found on edaboard.com: Comparator Test
That's a lousy test method for such a detailed question. You embed time-domain low-overdrive errors relative to a DC Vio spec / interest. testing of real comparators tends to put them in an integrator / divider loop which gives you a high gain measurement point and gives the comparator a quiet low impedance drive at the inputs.
I presume your hysteresis plot is recorded as static transfer characteristic. The transient test signals may be simply too short to trigger. The comparator behavior can be characterized by a response time versus overdrive curve. Fast response needs some overdrive beyond the 790 mV point.
Hi guys, I am looking a way to measure the offset of a comparator. I tried to find around the forum and in fact I found some comments on it but nothing conclusive. So, I would like to know if someone that have had the experience on measuring the offset of a continuous comparator and how can I do it? By the way, what if the (...)
i am building an battery circuit and need an LED to turn on when the battery is at the correct voltage. I need help in choosing the right op-amp, configurate it as a comparator, and also than set up the reference voltage and the voltage in,and attaching it to the battery circuit.
I am currently developing a test block for a mixed-signal design. The block is suposed to check if two signals differ more than a user-given tolerance. The signals to test are voltages stored in capacitors. The strategy previously adopted for this block was a switched circuit that charged a capacitor with the tolerance, then added one of the signal
hai all, I have designed a conventional dynamic and a double tail comparator in 180nm tecnology. To measure the offset voltage I did DC analysis by setting one of my input at .9V and other as a ramp signal of amplitude 1.8V. The clock frequency is 500 MHz and the supply voltage is 1.8V. I got the transient analysis as expected. But in the DC analys
Hi, Use a pll. ******** Another interesting way ( to test) A notch filter with 10MHz on a 10MHz square wave... and a high order low passfilter at about (over) 30MHz. Then a comparator to form a square wave again....i have never tested this (Fourier line of square wave) Klaus
Hi, I am presently doing some practical test of peripheral of PIC 12F675. While trying to use analogue comparator, a weird result is noticed. I have made a circuit with 12F675 connected as follows. GP 0 used as ADC as well as CIN- for comparator. GP 1 used as output for LED_1 GP 2 used as output for LED_2 GP 3 not used. GP 4 not (...)
To sense low voltage drop across 2 shunt resistors such as 80mV requires 1MOhm shunts to ground. A precision comparator with null adjustment or OpAmp +Sum with 1M impedance to ground with FET input currents of 1pA should work for testing. Then choose gain to suit test. Or one can use a current bridge circuit with a reference in between.
Hello, I have a basic question, but it seems that i cannot find it's answer. Assuming we would have a dynamic latched comparator such as the one presented in Figure 2(a). How would you quantify the hysteresis of such a circuit (because of the latch) and add hysteresis?
Hi There, I have a Voltage comparator ADCMP600 and I am trying to set the threshold (reference) voltage to 20mV and this can be achieved by connecting 20mV to pin 4 (Inverting analog input). My question is how to get 20mV from 3V voltage supply. I know the obvious solution is voltage divider but I feel because the ratio between resistors is
Hi, you are absolutely right.. Common mode range id the range of input DC voltage for that all the mosfets are in saturation (except the switches). And your test setup is correct.. and no need to give a DC voltage for the operation.. for example, if you are going to use it as a comparator means... you give a reference voltage in one input and ap
Hi all, I met a problem to test the offset of a V-T comparator, This kind of comparator converts the input difference voltage to time delay, now i wanna use Monte Carlo to test the offset of this comparator in ADE. I let the input voltage changing from -10mV to 10mV, and use the dc sweep to (...)
Hello MCP65 comparator DATASHEET ...the foruth line down from the top talks about "overdrive".....may you inform what this is?
Could it have something to do with the comparator settings? RA2 is also an analog input to the comparator. Reg CMCOM
When I consider which devices might make it a difficult job, I think of a comparator. Its output is either high impedance, or connected internally to ground. My first experience with trying to get a comparator to operate was frustrating. I could not tell when it was on or off. For a while I thought I had broken it and had no idea what I did wro
Hi, I am designing a test board for a hysteresis comparator which need two reference voltages of which the difference is mV level (ex:10mV to 50mV). I found the test environment is too noisy and the noise is easily to achieve over 50mV. Is there anyone has an experience to generate mV level reference voltage. Any guideline to follow? Thanks!
Hi. I must to design a cyclic ADC and after few weeks I found that my comparator has an offset error so I want to test this parameter with Hspice. at first i design a 3-bit flash ADC with Hspice but amount of SINAD that matlab show me is incorrect and give me about 22db. can you help me to correct this error and can you recommend a right for
You can take a look comparator - Wikipedia, the free encyclopedia Alex
Any idea where I can know what's the response time of the analog comparator inside the AT89C2051? It does not seem to be mentioned in the datasheet anywhere!