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Hi friends, I encountered a problem while doing PA Loadpull simulation, hpeesoft demonstrated the error information as follows: A virtual resistance of 1 TOhms was added to each node. error detected by hpeesofsim during HB analysis convergence. Thank you for your answering. here is the detaied error informatin: (...)
hi all i gave my design netlist below can any one tell how to rectify this error? thanks in advances **** 05/26/11 16:40:00 ******* PSpice 16.3.0 (June 2009) ****** ID# 0 ******** ** Profile: "SCHEMATIC1-t1" [ C:\Documents and Settings\DESIGN\Desktop\proximity ic shortcircuit protection\test-PSpiceFiles\SCHEMA ****
i try to design one rail to rail MOS op-amp i use orcad for plot the circuit and then by R&H convert to hspice model my AC design have no out put and in .sp file of hspice i see **diagnostic** dc convergence failure, resetting dcon option to 1 and retrying **diagnostic** dc convergence successful you can increase the efficiency of t
Remove the .OP and add UIC to the .TRAN so you have: .tran .001n 6.00n uic It means "use initial conditions" rather than calculate the operating point. It is not uncommon for simulators to use a pseudo-transient analysis to try to solve operating point convergence problems so it may work. Keith.
Why simulators like HFSS and CST use (as a default) absolute convergence criterion not relative? I guess the last method could be more accurate because it for example can make difference between s11(n)=1, s11(n-1)=0.9 and s11(n)=0.2, s11(n-1)=0.1. In the first case relative error is 11% in the second - 200%, but absolute error is constant = (...)
Fast sweep setup, process hf3d: Poor convergence in computing port dispersion. this is a warning i have some questions about: 1. what does it refer to? 2. what is "port dispersion"? 3. how can i control or determine the properties of this convergence? 4. to what level this error may effect my results?
It is difficult to say. The problem appears to be related to QQ13 in the awbsg3526 model, but as I don't have that model it is tricky to say. The usual cause of convergence problems is floating nodes so I would check that all nodes in your circuit have a DC path to ground. The other possibility is an unstable model which could be caused by the
Hi thr, Presently I am trying to model aerodynamic effect of Wind turbine in VHDL_AMS more specifically in Mentor graphics ADvance-MS tool. All the designed got compiled successfully, but while simulating the design, I am getting following error. I tried various different ways to get rid of this problem. But the problem still persists. do you ha
Hello I am using HFSS for my PCB trace SI simulation. In my sweeps, the solver getting struck in one point at a particular interpolation error thinking that in that frequency convergence will occur. for example at freq 2.5 GHz where the interpolation error is 33%, the solver is thinking the convergence will occur at that (...)
normally dc convergence have following reasons: 1. models have discontinuity ,, some negative resistance in characterstics 2. simulator convergence algortihms... 3. some time design faults as well as your simulator is giving error for convergence i havent used this simulator but general idea: 1. try to (...)
I use CST MICROWAVE STUDIO 2008.... (sorry .. my english is poor) There is a aperture of nano-size on the surface of the metal(gold) and we emission the plane wave foward to the aperture and observe the Power flow distribution. (frequency : 309Thz , wavelength : 970nm ) This is what I simulate now... Not error is occured but the re
Hi, I have been trying to design the cantilever beam in 3D MEMS module, but always come an error crops up i.e: "No convergence achieved.." Is there a problem with the amount of force I apply at the edge or mesh resolution or something else? **Also, How do I vary the thickness and observe the respective change in displacement for the sa
Hi, I am trying to model ideal opamp in unity gain configuration (voltage follower). I used VCVS with max/min voltages. Hspice simulation of this circuit runs out with non-convergence error (saying timestep is too small). Can enyone help me to force this simulation run. Maybe some additional (ideal) elements I need to include in ideal opamp
Transient convergence is most often a modeling error - either unrealistically low capacitances (like you might get by trying to model with behavioral or primitive / ideal elements or by a less than complete set of active device parasitics) or a timestep that is just too coarse for the timescale of circuit activity, so the simulator steps past
Hello, Yes, you can use AFS, unless you have lot of resonance points... Recommendations for Efficient Use You should use error Type=Absolute, and error Tol (dB)>= -40 for the fastest convergence. The accuracy of the results is entirely satisfactory in most cases. Go through the online help for more details... 8.8.9. Advanced (...)
Hello , I can start the software and simulating in every case such as TT SS FF but except in the SF case ,in which case the software will make error and can't operate, could any one tell me why? is it convergence problem or software problem? or circuit problem? thanks.
Hi i am trying to simulate a very basic switched capacitor circuit in Virtuoso using a macro op apm model. But when i simulate, as you see in the picture in DC analysis there is very big offset in the output. and in transient analysis there is an error: no DC convergence I think my problem i
Hello all. Well this is the problem I am facing. I have designed an LDO by designing an bandgap reference and a differential amplifier. The problem I am having is that when I connect the two pieces together I get a vonvergence error and I am not understanding why because the amplifier and the bandgap work perfect separately. I am attaching a pictur
Hi, everybody! My error is : **error** internal timestep too small in transient analysis ... hspice diagnostic for nonconvergent nodes and elements
I've designed a dual path loop filter (as attached) and plug it in my linear model in Spectrarf but an convergence error occur during simulation. :cry::cry: Can anyone help? Thanks

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