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Counter Programmable

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55 Threads found on edaboard.com: Counter Programmable
Hi, You could use programmable logic as single chip solution. CPLD (Or older GAL, PAL...) You could use a microcontroller as single chip solution. You could use two HC390. You coud use ICM7217 as 4 digit decimal counter with multiplexed BCD outputs (+ 7 segment LED display controller) ... Klaus
Hi everyone, I am designing a 4 bit up and down counter that when counting up has a programmable modulo value. Here is my code for the whole counter with modulo but I keep getting errors that I don't know how to solve. library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.A
Hi everyone, I am making a 4 bit counter that can count up or down to a modulo value I can set using switches on the board. Here is my code and the errors I am getting. library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity counter4bit is port( mod_value: in std
HI, I want to send the 32bit counter through the UART which is of 8-bit in VHDL ...Now I am done with the 8bit counter..but I am finding difficult to send the 32bit counter and receive as a four 8bit packets..could anyone please help me...code is attached.. library IEEE; use ieee.std_logic_1164.all; use ieee.std_logic
yes you can make a programmable synchronous (or non synchronous) counter. if you are doing one with software instead of actual gates....you can have varying time delays in the division, which would give rise to time jitter (phase noise) so you must be careful.
am going to design a programmable divider it includes prescalar(P), main counter(M) and swallow counter(S). i need to clarify what are the values we need to give for P,M and S (ratio).
Hai all. I have an issue with my C8051F120. I'm using P1_0 Pin as programmable counter Array Pin. Whenever a Match occur between ((PCA0H<<8) | PCA0L) and (PCA0CPH0<<8) | PCA0CPL0), the PCA Module will Toggle P1_0 Pin. But at some instance I have to manually toggle that same and then I will hand over the Pin to PCA Module. This is what my require
there is another post on the same project this is to count the hours or minutes??? or just a counter?
This is very simple timer logic, power up 500us, reset 200us, and the cke.... If you want to make generic/programmable logic to control such process, you have to write several timers/counter to do it. How to create/synthesize a power up sequence for a specific design? Let's take for example a DDR3 memory controller
Hi, I'm simulating a PLL based frequency synthesizer using dual modulus prescaler. I know I should divide output with MP+A while A is programmable down counter. The theory is "N=A(P+1)+(M-A)P=MP+A". I found a control logic as below to realize this. My question is how to implement "+A" in divider? I mean I can divide by MP but what about MP+A? [A
Can be hardly solved without a complex digital circuit, involving a clock generator, a pulse width measuring counter, a programmable timer to reproduce the period, a sequence controller.
I will try to make a separate process for combinational. Regarding the down counter, actually it is synchronous. It is my fault because of my bad indentation; IF (rising_edge(clk)) THEN IF (dir = '1' and cnt_en = '1') THEN cnt <= cnt + 1; TCD <= '1'; TCU <= '1'; ELSIF (dir = '0' and cnt_en = '1') THEN cnt <= cnt - 1
I presume you've got a counter that reloads itself every time it reaches zero, correct? If so, you should be able to look at your LOAD signal whose frequency will change depending on the load value.
I assume you are generating the 60Hz signal digitally using a 100KHz clock, right? If I understand that correctly, then one way of doing this would be to have a divide-by-1667 counter to generate a 60Hz output. Then, you would have a second "delay" counter that would count a programmable number of clocks before enabling the first (...)
I posted a 3-digit BCD counter code in this it's for a Spartan-3e kit, it might help you in coding. And try commenting your code as it helps others analyze it. Regards...
What do you mean by : "programmable timer counter" ??? What does the company make?
What do you mean exactly with "my ASIC design?" :?: (ASIC normally means: an IC specifically designed for an application, this does NOT include "programmable chip that does what I program into it" like microcontroller, CPLD, FPGA etc).[/QUOTE
Do you need the source to be a sine wave really? Or would it be enough to work with digital and simply filter the higher harmonics at the end? If the latter, you might find a programmable down counter from a higher, higher accuracy reference could give you the two tones simply by toggling the right bit. I've made 10MHz 16-bit (...)
Hi! I never used programmable logic devices before but I'm working on a project where I could benefit from using them. The project would be a multichannel (2-5) frequency counter, working in the range of 5 MHz with maximum +/-500 kHz slow deviation. I would simply count the edges with 1s gate time but I need parallel counting. So I need individu
You would want to implement a state machine respectively synchronous edge detection logic and a counter, operated with the 27 MHz system clock. The obvious way is with two one-shot timers. There are other obvious ways for it in FPGAs (programmable logic). If you don't know what DE2 is (an Altera FPGA development board), you shoul