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89 Threads found on edaboard.com: Delta Sigma Code

Cascaded of Integrators (CoI) Filter for Sigma-Delta ADC

Hi Altruists, I need to design an incremental sigma delta ADC (OSR=500) where I need to implement a CoI Filter. From literature study i found that this CoI filter is actually same as CIC but without the comb part for CIC. I need to write a code in Verilog (or Verilog A) for CoI Filter. I dont have so much deep knowledge on CIC. I checked (...)

Explanation Sigma Delta Modulator

Hi everyone, I'm using a Capsense from PSoC which is use a sigma delta Modulator to measure a capacitance. First of all they assume that the capacitance is equivalent to a resistor with switch sw1 and sw2: 131371 After that we have: 131372 I don't understand how they find: Ic= Cs Fs Vc

measuring ENOB of a sigma delta ADC

I would like to measure the ENOB of a sigma-delta ADC on Cadence Virtuoso. what are the steps to be done ? do i need MATLAB ?No, you don't need MATLAB at all. Simply use Skill Language in Cadence dfII. ENOB=(SQNR-1.76)/6.02 Excerption from My Skill codeTstep = 1/fs Tstart = round(5*(1/fIF)/Tste

system Verilog code for sigma delta modulator

hi all, is there any system Verilog code for a 1 st order sigma delta modulator?

simulink file for the design of a quadrature delta sigma modulator

hello all !!!!!! I need a simulink model of a quadrature sigma delta modulator and the matlab code to calculate the psd of the output. Can anyone help me with that???

2nd order Delta Sigma Modulator

I am creating a second order delta sigma modulator for a fractional n pll. First I created the first order one. It worked ok when I removed the output flip flop that had to act as a comparator. Of course there's some sort of comparator glue logic. However it is combinational circuit. I wrote a code in matlab and it worked fine, designed the (...)

Limit cycles in sigma delta ADC

Hi..... I have designed and fabricated a 16Bit second order, single bit sigma delta modulator based ADC. During testing of ADC, when we apply zero volt at the input of ADC, sometimes it works fine and sometimes it gives a fixed code of 00FF (hex). Otherwise the ADC is working fine. Are these limit cycles and what is the solution?

low pass filter design

hello dear, i generated a target impulse response of fir low pass filter and then interpolated it , now i want to generate ternary tabs or coefficient using second order sigma delta modulation, please tell me how to generate it, if any one have code or idea

Sigma Delta calculation of SNR

can anyone pls explain this code to me: function outx = sinusx(in,f,n) % % Extraction of a sinusoidal signal % sinx=sin(2*pi*f*); cosx=cos(2*pi*f*); in=in(1:n); a1=2*sinx.*in; a=sum(a1)/n; b1=2*cosx.*in; b=sum(b1)/n; outx=a.*sinx + b.*cosx; and also this one: function = calcSNR(vout,f,fB,

How to detect micro volt changes in a voltage?

hello, :-xPost #1 this soluce is impossible ! delta +VRef and -Vref must be > 1,5Volt :smile:You can try MCP 3424 or 3421 ADC delta sigma converter up to 18 bits i did a lot of test on it .. i get 2?V / point with 17 bits of resolution ( reference =2,048V) see code C18 and results on ea

impulse response check of sigma delta ADC

hello All , I am trying to prove the matlab code via veriloga opamp model with ideal switches and capacitors on cadence, to prove the STF, NTF, OSR according to Schreier ,I need to do an impulse response check on my ADC, this simply means removing the Quantizer from the loop and with a veriloga model I can generate a sequence of impulse respons

matlab code to plot the PSD of a quadrature sigma delta modulator

hello everyone !!! I need a MATLAB code to plot the PSD for a quadrature sigma delta modulator. Can u provide the same to me???

conversion filter from simulink to vhdl

Hi, Because i have obtained with Malab simulink simulation the same signal ouput as in the input. I need to design decimation filter in VHDl code for this simulink sigma-delta anlog to digital converter. osr=64 = 16 * 4 Fs=10.24MHz fb=80Khz nb=8bits here i design the decimation with two sinus cardinal "comb?filter" (decimation of (...)

SNR of digital sigma delta modulator

i hv written code for sigma delta modulator of DAC in Matlab, i m taking input frequency 20khz and nyqiust frequency 48khz,over sampling ration 128.i got spectrum of modulator using hanning window with frequency 3000(normalised frequency) but really i confused how to measure SNR of this output spectrum in Matlab plz help me...............

digital sigma delta modulator in DAC

i want implementation idea of digital sigma delta modulator in DAC,this block is digital.i m taking 24 bit sigma delta modulator and 4 bit truncator but i dont understand how to take 24 bit sin signal in electric software......plz tell me suggestion.....:-?

design of second order sigma delta using hspice

hi i need to do design of second order sigma delta using hspice and need help on it.. I HOPE SOME ONE CAN HELP ME WITH THE SAMPLE code PLEASE... REQUIRE URGENTLY.. PLEASE MAIL TO: mojtaba.20511@yahoo.com thanks

how to connect analog input directly to FPGA Altera board?

hi; kindly I have a question; I want to implement sigma delta ADC on Altera DE1, i wrote the code and run on QuartusII; now i want to know is it possible to connect the analog input directly to the board? as in my code the input is introduced as signed so my original analog input should be converted to the type signed (...)

verilog code for delta sigma ADC

hi i spent a lot of time to find verilog code for sigma delta ADC but cant find anything useful :( is there any body who has verilog cod for sigma delta ADC ? i would be so glad to seen it share here. thank ou