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179 Threads found on edaboard.com: Ethernet Mac
Hi, I would like to test following 10 Gig mac on kintex kc705 FPGA board. OS is windows 7. The 10 gig mac is ensemble with kintex board via SFP module. Is there any reference design available?
how to filter mac address only from ethernet packet?
CPSW(double ethernet of AM335X)could work in two modes, one is double mac, the other is gateway mode. 131938 ENVIRONMENT MYD-AM335X,pc, network devices, ethernet cable, etc of Linux system. MYD-AM335X ethernet 0 <--connect--> ROUTER MYD-AM335X ethernet1 <--connect-->
would you tell me how i can provide an optimum CRC for my data packet? A mac is responsible for the ethernet framing protocols and error detection of these frames. CRC/FCS, DA, SA, Len/Type, etc is provided from the higher layers. So either implement higher layers or else you have to write your own RTL for data, FCS/CRC.
Hey guys. I've looked at datasheet of PIC32MZ2048EFH064 and it says it has ethernet support. But does it mean that the ethernet is integrated like in pic18f66j60? I ask because I've been searching for example schematic and found PIC32-EMZ-REV-B board. It has PIC32MZ2048EFH064 and.... LAN8710A-EZC chip for ethernet! But WHY? PS: I (...)
Using enc28j60, you have to implement the TCP/IP stack in software, thus there are no specific registers for IP addresses. They have to be inserted at specific locations of the IP and TCPIP or UDP frames. The chip has registers to set it's unique mac address. A possible way is to use the Microchip TCPIP library for your project. Otherwise you ne
Can you interface ARM controller (say STM32F4) to Internet using ethernet controller? If yes, tell me how will you do this?
It's said that the "continuous data stream" is ethernet data. So packet respectively frame synchronization takes place before the mac fields. Any state/index counter has to refer to it.
In ethernet module , why do we need FIFO block before the mac layer ? Can we bypass it in FPGA?
Hi friends! I want to extend my knowledge about VHDL design and I am thinking t buy a book where I can learn with practical examples how to make synthesizable RTL designs for very complicated like ethernet interfaces, LVDS interfaces, etc. And I would like to have some adavanced knowledge about programming advanced test benchs for modelsim.
I always thought a SFP was a physical link layer only device? If so you need to ask the PHY or mac rather then the SFP for link status, the SFP will only tell you that it sees modulated light, not that the light encodes ethernet frames. The SFP modules I have played with output a PECL pair that is pretty much an amplified and limited version of
Anyone know of any uc with gigabit ethernet mac? ATMEL SAMD5 has Gmac, but it has no internal flash. I wish they could put some internal flash in that chip.
You can't use connector J4 to communicate with the FPGA. It's used only as a USB HID controller. Other then that, you can use the ethernet port, but this will require implementing (or using an IP) ethernet mac on the FPGA - which I think isn't a project for beginners. J13 is connected to a USB to UART IC - I think you'll be able to communi
Hi, I have tried to implement the example design which provided with "Virtex 6 Embedded Tri-mode ethernet mac wrapper v2.3" in Core generator,on virtex 6 development board(ML605) When I program it on the board , the packets were successfully received by the FPGA,but the board is not transmitting back the packets.I am using "Wireshark" for an
hello every1!!!! i am working on mac frame generator, and i need to generate CRC ,append it after payload field according to Standard ethernet frame . here my payload length is varying, my input in payload length ,i have DA,SA,Ethertype, etc all the fields required. could someone suggest a method to generate CRC??? thanks!!!
sir I am tring to trnasmitting data from virtex2pro kit to my laptop with Tri-mode ethernet mac 3.5.i with GMII 10/100 mbps in ISE 10.1.I am using wireshark to capture the frames. But I am facing problem it necessarily to use management configuration for xilinx virtex2pro board LXT972A(U12) IEEE 802.3- complaint Fast ethernet physical l
sir I am tring to trnasmitting data from virtex2pro kit to my laptop with Tri-mode ethernet mac 3.5.i with GMII 10/100 mbps in ISE 10.1.I am using wireshark to capture the frames. But I am facing problem it necessarily to use management configuration for xilinx virtex2pro board LXT972A(U12) IEEE 802.3- complaint Fast ethernet physical l
According to that web page it shows both of these as compatible with the Spartan 3E. 105811 105812 Just open a project with the part you want to use then open the Xilinx core generator and find the ethernet mac and see if it's available. Generate the core and try to build it. I know the tri-mod
for questions 1 and 2 have a look at the answer to question 3 is no your don't need a unique IEEE mac address for a LAN not connected to the internet. We would assign local mac addresses (usually linked to the IP address) However, if you later connected to th
i saw one demo on proteus that ENC28j60 got ip after it run. and if we use this address in web browser then page like follows come. so this page saved in host controller or ethernet controller?? mac address is set by network or we can set ??????