8 Threads found on edaboard.com: Excalibur
Hi, I'm trying to write a simple module in Verilog that I can use on an APEX APEX20K200EFC484 starter (excalibur) board to write characters to the display.
I have seen some examples here for other displays and FPGAs but finding it very difficult to get the correct information on how the display decoder works.
This looks promising: https://ww
PLD, SPLD, GAL, CPLD, FPGA Design :: 12-08-2009 08:20 :: alias__neo :: Replies: 0 :: Views: 2295
===== Introduction =====
This posting shows a solution against glitches or disturbing horizontal lines on an agp HIS excalibur Radeon 9600 Dual DVI graphics card and maybe applies to other cards as well. The card produces on the display, attached to the second output strong artifacts while playing a video or even just by moving a wi
Service Manuals, Requests, Repair Tips :: 01-21-2009 16:30 :: w_m0zart :: Replies: 0 :: Views: 4221
Is here anybody know how to simulating Altera excalibur in Synopsys VCS.
I have read the document from Altera, but I am still feel delusively.
PLD, SPLD, GAL, CPLD, FPGA Design :: 11-12-2004 05:11 :: blueagate :: Replies: 2 :: Views: 1318
Now we want to use some ARM9 based FPGA devices for verification in a SOC design. We are interested in the excalibur of Altera.
Is there anyone having experience about such devices? We want to know everything about it.
Thank you!
PLD, SPLD, GAL, CPLD, FPGA Design :: 10-20-2004 14:35 :: optor :: Replies: 4 :: Views: 1199
Hi,
I got a Nios development kit from Altera a couple days ago. I tried to compile a tutorial in User's Guide for Altera Nios (GNUPro Toolkit):
nios-elf-gcc -Tsim.ld -g hello.c -o hello.exe
then I got following massage:
/cygdrive/c/altera/excalibur/sopc_builder/bin/nios-gnupro/bin/../lib/gcc-lib/nios-elf/2.9-nios-010801-20030313/../../../..
PC Programming and Interfacing :: 07-07-2003 13:28 :: ltg :: Replies: 0 :: Views: 1151
@ltera actually has a device excalibur that contains a hardwired arm 9 processor. excalibur is evolved from Apex family. I would say Apex or Stratix might be a good choice for you.
PLD, SPLD, GAL, CPLD, FPGA Design :: 03-21-2003 17:26 :: juripero :: Replies: 2 :: Views: 1801
See Altera excalibur ARM.
AMBA example's and simulation models.
Microcontrollers :: 01-22-2003 14:44 :: bering :: Replies: 5 :: Views: 3300
I am not sure whether the programmable SOC devices such as
Xilinx Virtex-II Pro or Altera excalibur do support partial & run-time reconfiguration of FPGA logic or not. If they can,
it is also possible to implement
a run-time reconfigurable system
that allows us to load and unload
cores into the FPGA fabric, and
this process can be controlled
Microcontrollers :: 01-15-2003 11:43 :: Ohh :: Replies: 15 :: Views: 2716