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10 Threads found on Extended Drain
I'm not 100% sure as I currently don't have access to documents of 65nm, but there may be cases where they needed DRC tool to know which diffusion is the drain. So they may have added it for this reason. For example an extended drain or a lightly doped drain device may have different rules which requires identification of (...)
If your particular PDK allows permuteSD (or whatever the LVS tool of choice likes to call it) and this is a simple symmetric MOS (not extended-drain, LDMOS, etc.) then there's no LVS difference and you don't have to set anything. I found, though, in one Assura setup that this aspect needed messing-with and was not very obvious. I forget the detail
Source and drain are permissible to swap, in standard CMOS. Only if you have an asymmetric device design (drain-only extended, or source strapped to body internal to the PCell) is this not true. Take up your ideas of "should" with the netlist procedure call, and any layers of subcircuit or schematic below symbol.
hey guys, what are some advantages and disadvantages of drain extended mosfet over standard low voltage mosfets? assuming I am using these for a common drain amplifier for both high and low voltages? does drain extended mosfet have body effect? thanks!
Hi, From design point of view, if one wants to use LV device for HV supply operations. On has to use cascading, or extended drain structures for reliability. One should run GOX or SOA sims before putting such design onto production. Supreet
Touchstone Semiconductor has extended its free demo board program through Dec. 31, 2011. The company is offering free demo boards for their analog IC products, including the 0.8V, 0.6?A TS1001 operational amplifier, and the new push-pull TS9001-1 and open-drain TS9001-2 ultra low-power voltage monitor ICs, with +1.252V reference and a 1% initial
Can anybody send the pdfs on DEMOS(drain extended MOS)
Hi all .. CAn anyone tell me about drain extended devices and LDD ,
Hi electronXwork, I have never come across any paper etc. that would have recommended to use a larger pitch for the contacts in the drain region. Logically, it makes no sense as one would want to have as many contacts as possible. Maybe it was a misunderstanding and an extended drain region was suggested? That would make sense, as it is (...)
Demos : drain extented mos Basic Theory The extended drain transistor allows higher voltages at the drain by the increased width of depletion region between the gate oxide and the drain diffusion. The depletion region is wider due to the lighter doped drain. hope this helps And (...)

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