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4 Threads found on External Signal 8051
That's by design of x51 processor and can't be avoided. All port pins, that have an internal pull-up, e.g. P1 will go to high state during power-up and reset. Your external circuit must be designed to deal with this behaviour. In some cases, you may need to invert a signal. Basically, there's no problem if all signals are defined active low.
When you connect external ROM and RAM to 8051 you have to latch the lower half of the address bus and that is done, for example, by the 74LS373 controlled by the ALE signal .. eg. see attached picture .. Also, EA pin has to be grounded .. With all the above in place - the hardware is ready, software (Kiel or whatever else) that you use (...)
Hi Friends, Till now i have worked on 8 bit 8051 architecture mixed signal based micro controllers(Which includes 10bit ADCs, 10 bit DACs, UART, I2C and SPI our applications we need higher resolution of ADCs and DACs. So we have chosen external ADCs and DACs.Now i want to change the micro controller design. Can some body suggest me a
The control signals such as /RD and /WR are generated automatically by the 8051's hardware, while executing MOVX A, @DPTR and MOVX @DPTR, A respectively .. The ALE signal is always generated, wheter you like it or not .. And the /CE (chip enable) pin of the external RAM is usually connected to 0V (GND) unless you have more (...)