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Folded Cascode Compensation

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39 Threads found on edaboard.com: Folded Cascode Compensation
Attached is a folded cascode amplifier with a cascode compensation capacitors Cc. How does this circuit prevent the formation of the undesired zero (in the right half of the s-plane ) ? Please let me know a logical explanation .
Hi Safiya You use folded cascode design to save power and easier to compensate.
Specs; DC gain 60dB UGB 50MHz PM >60 VCC 2.5V I am working on this design and DC gain & UGB is already fulfilled the spec,but the PM is always around 30 deg. Because the sec pole is right at 63MHz and cannot be moved right(high freq). I know the sec pole coming from the folding point, but no matter I increase the current in the cascoded br
I have attached a picture of a folded cascode amplifier with class AB push pull stage. My question is regarding the SLEW time of the amplifier. During the 'internal slewing' when the compensation capacitors CM1, CM2 are being charged up, what is the status of the M4, M4C, M8A, M9A, M2C, M6 ? Do these mosfets operate in saturation or (...)
how to add 2nd stage on single ended folded cascode? i cant figure it out,, kindly tell me, its urgent. im getting gain of 72dB and 100MHZ + ug FREQ. SO HOW TO ADD CS AMP to increase gain to 100dB???? im using NMOS input folded cascode
u can proceed folded cascode with CS as the second stage this will give you the required dc gain. and it will meet the swing requirement also. you can keep miller compensation or cascode compensation for the stability.
in folded cascode compensation capacitor and load capacitor is you must use positive fedback gain cause high unity gain frequency and nice Phase Margine. - - - Updated - - - if you want increase the campensation capacitor,unity gain will be decrease.
Hi I wanna design an opamp (2 stage folded cascode) where can I find analysis of this opamp? I need to know poles,zeros,unity gain,... for designing? plz help me I wasnt able to find any book or paper.:cry::cry: tnx
I'm going to design a two stage folded cascode OTA. first stage is folded cascode(nmos input pair) to provide gain second stage is common source to increase the output range compensation is cascode compensation My question is in my circuit, how to find poles and (...)
Hello, I have an assignment for a DDA (Differential Difference Ampplifer) where Vo= A( (Vpp-Vpn) -( Vnp - Vnn)) Hence Vo= A Then I have two input different stage that then add before it gets into the folded cascode stage (Hope I am making sense) But I have the following specs Vdd= 1.8v Total current=150uA Vpn
Dear all, I am designing a high frequency integrator. The one i designed is as It has required magnitude frequency response but weird phase response, and when i connect the load capacitance the gain of magnitude curve
With a folded cascode of the first stage and common source as the second stage. How to calculate the slew rate? The value I calculated by Itail/Cc, that is the tail current of the differential divided by compensation capacitance, is far different than the one I simulated. Should we consider the miller effect here? It seems the variance (...)
i have designed a two stage opamp (used for a buffer, fck=15M, CL=12pF), the first stage is folded cascode, the second is common source, and i use cascode compensation to ensure frequency stability, now, i get the following simulation curve, when the input signal from 0.4 to 1.6, it settles well, but when the input signal (...)
i have designed a two stage fully differential opamp with hybrid ahuja compensation (that is, two compensation capacitor used in the two cascode nodes of each branch), the first stage is folded cascode, the second is common source, and the CMFB is continuous common mode feedback which have two input pairs, (...)
You have to be careful when you write expressions without referring to a specific topology cause it can be misinterpreted (as just happened) LvW, I think jimeece13's topology is a folded cascode amp, so he doesn't have a Miller cap (his compensation is done with CL). So, yes, the unity gain freq is given by fun = gm/(2*Π*CL). diemilio
with a carefully designed 1-stage folded cascode, you can achieve about 70-75dB (not far from what you need) and you could use gain boosting to gain some margin. In this case you have the advantage that you need no compensation. If you want to design a 2-stage opamp, try to read "An improved frequency compensation (...)
for me design a folded cascode with only a dominating node only, so you can have a large gain but you may not need to do compensation. if still cannot meet your requirement, then do 2 stage
Depending on the threshold voltage of your technology, it should not be too difficult to design a folded-cascode ota at 1.2V. I would at least try it since it will save you a lot of headaches with compensation. Moreover, you can also scale the coefficients of the modulator according to the output swing (just one more degree of freedom). (...)
i want to design a two-stage opamp with cascode compensation ,and the first stage is folded cascode structure, the requirements as follows: resolution:11 bit clock speed: 20M CL=2pF,Cs=Cf=1pF,DR=70dB,Vdd=3.3V,output swing= +/-1V then how to design the two-stage opamp step by step? how to choose the size of (...)
hi why miller compensation not required in folded cascode OTA? Thanks BHanu