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Hello, I'm doing a research about some old Agilent/HP ATFs that have (probably) been counterfeited. I'm searching for these two old designer's catalogues, one by Agilent and one by HP: Communications Components Designer?s Catalog. Hewlett Packard. 5966-0895E (9/97) Semiconductor Products Designer?s Catalog. Agilent Technologies. CD. 5968-78
Hi, I am wondering how to calibrate the acceleration sensors. The sensors I am working with are very similar to what we have on fpga development boards. I have readout electronics for sensors with can measure from 10 g to 100 g. I am not sure if get the accurate reading. I am wondering if there is available calibrated vibrating surface on which
Because you can only synthesize circuit descriptions that are supported by the target hardware. No modern fpga supports double clock edges. You can find emulation circuits for double edge clocking in literature comprised of two single edge FFs and additional combinational logic, but they have bad performance and problems in timing closure.
Hello, i have an EFR32FG14 board which physicly looks like in the photo bellow. I ran The following Code where they say that PC10 is my output In the following manual shown in the link bellow there are two places on the board where PC10 could be found as shown in the photos bollow. Which one of them has my output signal? Thanks. https://www.
I have put together labs in different universities, and the typical culprits are: power sources, singal and function generators, oscilloscopes both digital and analog (both come in handy for different tasks), we also use fpga/arduino/uC to drive the digital parts of the IC (there is ALWAYS some digital somewhere). if the chips are not packaged, the
Hello i am using a 12v 7Ah battery to run a motor with a fan attached to it. Problem is the decrease in speed or say load handling capacity when I am increasing the wire length. I need to run a 7 mtr length of wire but in 5 mtrs only I am facing the problem . . .Normal LED lamps are working at that end but motor is not working . just I
Hello all, I want to make a comparator using XOR gate. Let's say it is a 1 bit comparator. How many XOR gates do i have to use. How to design this. Please guide me on this.
Hi, I think the fpga ground and the common ground should be connected at a SINGLE point as well as the Laser GND and the common ground. This allows the return signal to flow back towards the common GND. Note, for signals operating at 400 kHz the return signal takes the path with the lowest impedance (NOT resistance!), which is in this case in t
Hi , I am working on this Problem (Extracting Filter Model from S parameter). I m looking for Mathlab function or code if it s available. Or any things related to this. Thank you
PCIe is preferred for high and fast data rate. But then you have the complexities of a reliably working host-side firmware that will control the PCIe. Then again the Nexys video Artix-7 does not have a PCie i/f. The next best interface would be Ethernet. Xilinx has a TEMAC core which is not so expensive (initially you also get a IP core hardwa
Dear all I have two model of BRAM in verilog. I dont know which of them is more accurate? Could you please check the attached code and tell me which is better? I have attached both of codes in "bram.txt"
Dear all, I would like to generate a precise voltage of Vref/4 from reference voltage Vref. I do not want to go for bandgap reference circuits. I was thinking of using sigma delta DAC for this purpose and also studying about individual level averaging circuits. Could some one guide me with this? TIA
Is there any essential diferrence as far as training time is concerned between a CNN running on a fpga and the same CNN accelerating on Google Coral Dev board? What I mean, is this: can I achieve faster training by using Google Coral Dev board instead of a fpga?
What is the difference between Difference between the Sample/Value Function in Cadence Spectre Calculator ?
I recently installed quartus 17.0 lite version and wanted to target device 10M08SC324UBGA. To my surprise, software only supports dual supply version for this package. I could not find any info in the site or any forums. I thought all devices/packages were supported. any advice?
can i store these bitstrems on fpga's memory and then switch between them? As mentioned in the above post, you can store the bitstreams in an external flash. On SRAM based fpga internal memory (e.g- Xilinx fpga), no.
Hi, I am simulating 25% duty cycle passive mixer(direct down conversion) as shown below; 158991 The conversion gain vs IF frequency should have low pass filter characteristic and the 3db cut off frequency is calculated as: Fc = 1/(2*Pi*(4 Ron)*C) My values: Ron = 150 Ohms; C = 1pF; Fc = 265MHz But simulat
I want to accelerate CIFAR-10 dataset on a Virtex 5 fpga. I think I have built correctly the CNN on VHDL. My question is how I load the dataset on the fpga? Or should I send the images through another device/laptop on the fpga? I thought also of using SPI/I2C/UART/Ethernet but seems this makes a bottleneck? Right? Also, could it be better to (...)
Actually i want to transfer my data using 10G Ethernet connection. Xilinx offer variety of cores for 10G. There are some that state they are MAC and some that state the core has just PCS/PMA. What do i actually need to transfer my data from fpga to another card, using 10G Ethernet connection?
Hello, I have an fpga clock coming into my design. I want to simply send this clock using another pin. From working with Xilinx - I learned that the recommended practice is to use an Output DDR Flip Flop for that purpose - as described in this link :