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26 Threads found on Fpga Programming Problem
Hi Friends, I'm facing with annoying problem that I hope you can assist. When I try programming the fpga (Cyclone IV) with a .sof file it works as planned. But when i'm trying to program it with The .jic file it can't retrieve the configuration files from the EPCQ16 chip (CONF_DONE remain LOW). For converting the .sof file i'm (...)
Recently, we faced a problem during the JTAG programming for the cyclone 4 chip EP4CE40. The chip suddenly was not recognized by the jtag cable. At startup, the fpga loads the configuration file from the EPCS flash. The older EPCS jic file works fine. We wanted to change the code stored on the EPCS flash by the JTAG like we always d
Hi I just got a custom fpga board in house and I am having trouble programming it. I am using Actel's(Microsemi) IGLOO AGL250V-FG144I. There is a 10-pin jtag header on board. To program I am using Actel's FlashPro3. It has a 12 pin jtag header, with an extra pin called VJTAGENB that is for IGLOOnano device so I have left that pin unconnected. Whe
hi guys, i want to implement the even-odd merge sort in a fpga using vhdl, 16 numbers of 32 bits each, as input, but the problem is, i really down understand how does this sorting algorithm works, or it's suppose to work, can anyone help me ?
Hello, I am using Virtex-4 RocketIO MGT with 12 RX channels. It works at 6.4 GS/s. I am using MatLab to see the output of these different channels. At present the channels sometimes get synchronized after several reset or re-programming fpga or several read from RS232 port. ADC is the input. I have redesigned the GT11_INIT_RX 'fsm' generated
Hi. We've just started with a university project where the idea is to implement a MCU on an Altera DE2 board. We've previously successfully implemented a 32-bit MIPS processor on the fpga so we are thinking of just using this architecture. The first problem we are facing is the programming part, how to store the assembly code coming from the (...)
Hi, I'm new in working fpga with altium designer I worked before with ISE and Quartus without any problem, but now I want to generate simple project and create bit file but after hours I couldn't do this, I attached my project, any help would be greatly appreciatedbest regards, Siyavash.
I have documetation of si4136 but I want to write vhdl code for implementation for example 2000 t0 2100 with 200 khz channel this problem I used fpga spartan3 for send data to si4136, but I have problem in writing code and send data to synthesizer by spi.I dont know how can I set vhdl code for this problem. thank you for (...)
hi I'm working on Spartan 6 LX45 with CSG 324 package and have problem in programming. I use SPI configuration but in IMPACT Software when i initialize and search for device chain i see an hardware error and no device can be detect . Is this error related to SPI Flash or fpga ? I think if i disconnect SPI Flash IMPACT must detect (...)
Dear expreienced friends I am relatively new to the field of fpga but I really want to learn the field and do good in that. I have several problem while coding some system. I can make the block diagram, then over all work flow for the system, but when it comes to programming specially synchronously connected signals, where one signal (...)
Hello every one can any one help me in configuring Xilinx Platform Flash in ML604 Virtex 6 board. I am doing all the things right but still error or failed programming appears... Actually when I am cliking the icon of flash (just above the icon of V6 fpga) to select the Platform Flash, only two options occur, either SPI or BPI, so I selec
Just quick browsing through the 'Nexyx 3 board tutoral', it seems that you need the Digilent Adept software to actually program the fpga. Thus, the programming file is generated by Impact, but you need to use this separate piece of programming software to program the fpga. So, not directly supported through Impact. From the (...)
hi everybody !! im from vietnam . this web is very useful ..;) ..... the project is "draw lines, circles, squares on fpga by mouse and display on VGA " .I have to completed within a month.. ... plesea help me , all friend in the world ! What is the algorithm ??? thanks you so much ! p/s: my english is not good . hope everyone will u
Hi I have made a pcb board of the attached schematic, but I it has a problem. When I program the fpga (xc3s400) solely through jtag (Platform cable usb II) the fpga is program and okay, also when I program the FLASH (xcf04s) solely it is programmed as well (as impact says), but the problem is this that after (...)
Hello to everybody! I'm new on programming fpga and i have a question about a problem i can't resolve when i'm testbenching my component: The project is a driver for the LCD installed on the evaluation board; below there is the part of the code that got me problems and in particular it is on the signal data_lcd (...)
earlier i faced the similar problem with fpgas,but my problem resolved when i removed PROM on board....some junk data going into fpga from PROM on every reset ...but when i dump some program to fpga directly it use to work....I hope this may help...
hi everybody, i am learning fpga but i have got problem. after i wrote code in ise with vhdl language, how can i load to fpga board( i found digilent adept suite is it right program for load fpga?)? and where we set pin number? for example we write code as a: in std_logic b: std_logic but when we load to (...)
i am working with milman vlsi trainer(supplied by PSOC solutions), ) i have facing proble with spartanII 2S50Tq144 , after clinking IMPACT,and boundary scan it was showing that " there were many primary device detected" instead of 2 devices detected... can any one help me in this regards
Hello, Following the schematic below, i have a serial PROM with i can program successfully with iMPACT and a Xilinx S3-400 that i can also program successfully. The problem is that when i remove the JTAG, and i want to program the fpga from the serial PROM, INIT_B does not go low, why is it? I can not program the fpga from the PROM. (...)
That's probably the single most common Xilinx fpga problem. A huge number of things can go wrong depending on your hardware setup. Go to Xilinx web site and search for "DONE Pin does not go HIGH" or maybe "troubleshooting DONE", and try to narrow down the search using other keywords specific to your hardware setup.