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67 Threads found on edaboard.com: Freq Sampling
Hi All, I want to generate a true random number in Actel ProAsic3 FPGA development board which operates at 48 MHz. I tried to implement it using ring oscillators (RO) and used the system clock i.e. 48 MHz as sampling frequency. As the sampling period is around 48 MHz => 21 ns, the RO period should at least be double the (...)
Hi everyone I am working on ECG signal capturing using ADS1292R connected with Arduino uno, Luckily i found an FIR filter library for arduino, i included that in my code, but i dont know which type of filter is it. So i used the filter coefficients to plot the phase response in matlab. but i am not really good with signal processing, Can an
hi all i want to detect frequency between 140k and 145k.for example when signal is 140k turn on led1 and when its 141k turn on led2
Hi everyone I have a signal and I am using Matlab command pwelch to calculate the frequency of the signal, but the frequency I obtained is changed as I changed the sampling frequency. pwelch(x,window,noverlap,f,fs) For example, when using sampling frequency equal 8000, the (...)
Say I have a sensor that generates a signal of freq 30Hz and now when I sample this at 100Hz, which is above the 2fa; The Nyquist criteria is satisfied. But the output of the sampler has lot of frequencies right i.e., 30Hz, 100-30=70, 100+30=130, 200-30=170, 230.... Now if I dont do any digital domain low pass filtering on the output of ADC to
Hi, This probably a basic question about the relation between bandwidth and sampling time. I understood the following terms. sampling time: Time between two consecutive samples while sampling a signal periodically sampling frequency: Reciprocal of sampling time I am using a (...)
Suppose I want to sample low clock freq. (100MHz) signal with a high clock freq. (150MHz). Both siganl are produced at very close freq., only 50MHz difference. Is the nyquist sampling rate valid here? I mean, nyquist speaks about sampling an analog signal to a digital one, so when vice versa, the analog (...)
hello every one , I m doning a project over ADC , in some intel report i read that for UWB receiver arhitecture atleast we want 528 MSPS 4 bit ADC for m-ary OFDM technique,inspite of the input frequency being in range of GHz ,how does OFDM technique works for so less sampling freq.
Since fs=2*fc in this case sampling timing (ts) occurs on time 2*pi*fc*(1/2fc), 2*pi*fc*(2/2fc), 2*pi*fc*(3/2fc) etc. at this moment ( pi, 2pi, 3pi,...) sin funciton is zero. So you see graph around zero. You need to increase the sampling freq. Another words, in this case you always sample sin wave at zero crossing points, so sampled values (...)
Hai We are using frequency modulation since we are private FM radio station with freq 91.9MHZ regards Aneesh
1. In order to resuce the time of polling all 256 signal lines a) you increase the sampling frequency to check high request on lines. ... if samp. freq > (present clk freq)* 256, then you can sample all signals in less than one clk cycle of your present clk. One more advantage of using higher clk for (...)
Hello guys, I have implemented an ideal ADC+DAC converter and I did an FFT analysis. I did a test with coherent sampling with rectangular window and everything was ok. Input freq. 1,376...MHz, 500mV, sinewave and a starting phase of -90?. That gave Me 7,96bits (8bits ideal). Then I changed the phase to -60? and rectangular window and gave me
Hello, I would like to start a new project, my idea is this: an acquisition system based on pic, maybe pic32 but not necessarily, sampling freq. 100kHz, 24 bit, streaming data to tcp/ip client. Number of channels: as much as possible compatible with bandwith. Few years ago I made a pic32 based board that performs a playback of a wav file from a S
Frst you initialize ADC void ADC_init() //initialization of ADC { ADCSRA=0x82; //Enable ADC , sampling freq=osc_freq/64 _delay_ms(10); ADMUX=0x40; //Result right justified, select channel zero } And then you set the channel unsigned int ADC_StartCon
I have developed a simple costas loop for BPSK demodulation. It is working fine for 8Mbps data rate BPSK. The overall sampling freq is 125 MHZ. Inside the loop, the corresponding FIR and loop filters are running at 25 MHz. The lock range achieving is +100 KHz to -100 KHz of centre 30 Mhz. Now, I am updated the same for QPSK demodulation. The up
Hi, if anybody know resamplin algorithm mean help me sampling is used to take sample of analog varying quantity. like sine wave.. To get the approximated shape. Two times sampling is required then that of freq of wave to be sampled. As the Nyqueist 3rd rule. There are many sampling algorith
Hi I found that the open loop gain of the SC CMFB opamp is sampling frequency dependent, I use PSS+PAC analysis, it drops when sampling frequency increases, same opamp configuration with SC-CMFB, the gain drops to 69dB at fs=5MHz. the DC gain is 75dB when fs=1MHz , with continuous time CMFB is 77dB. any idea? thanks
Hi, I am trying to use the FFT library in mikroC to calculate the frequency of input signal. The code gets complied but I am getting wrong and random results. The calculated freq does not match the input simulated sine wave. Following are the details of my code - sampling freq = 1KHz Signed Fractional Data Output from (...)
a single bit conversion is referred as TAD if you have 8us for TAD you need at least 12 TADs per conversion so your complete conversion time is 96us which gives you 10.4kHz samplling freq... it hardly gives you to convert a 5kHz signal.... by nyquist if you want to read a 60kHz signal you need MORE than 120khz as sampling frequency.
Given a TDM system with 4 channels, say 4 signals (bandlimited) to fm1, fm2, fm3, fm4 are muxed and transmitted, using a sampling duration of 1/fs (i.e., within each Ts, samples of all the 4 signals are transmitted). What is the sampling rate for each signal?? Will it be fs*4???