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1000 Threads found on edaboard.com: Fuel Cell
I've been doing a lot of survey article for fanout for design compiler. But for some technology process such as 90nm/.18um , our target library (.db / .lib) has already the settings of max_fanout/ max_capcitance for our design, but in 4x nm process, I can't find the max_fanout in .lib file 1. Is that the reason for settings ?? (But how to determi
Hi , At the moment I am trying to perform parasitic extraction using PVS-Quantus to get the RLC parasitics of the metal stack (routing). the Pcell of my the transistor already includes RLC parasitics , I want this part of the layout to be blocked from parasitic extraction to avoid parasitics double counting To do that : ? I preserved the
I am trying to replicate a 4 X 4 butler matrix How should I emulate the MIMO encoder and decoder in Sonnet
Hi, I wanted to insert cell using script in innovus during eco. I intended to using ecoAddrepeater command for this, and wanted to add prefix for the cell added. (e.g. eco_fix_leak ) is there any way to add prefix to inst ? Really looking forward to your reply!
Hi, Everyone. I have a complete design in Cadence Virtuoso, and I want to import a layout file of Cadence SOC Encounter to Cadence Virtuoso. Can I combine Cadence Encounter Layout and Cadence Virtuoso Layout together?
The picture shows resistive trim networks. I am using a 0.18um CMOS process. How should I choose the NMOS switch size (W/L) for the resistive network 1 and 2 ? What criteria decides the required ON resistance for the NMOS switches ?
Hi , At the moment I am trying to perform parasitic extraction using PVS-Quantus to get the RLC parasitics of the metal stack (routing). the Pcell of my the transistor already includes RLC parasitics , I want this part of the layout to be blocked from parasitic extraction to avoid parasitics double counting To do that : ? I preserved the
I am receiving pulsed beam microwave bursts in the 2.4 - 2.5 Ghz range with a beam width <3 m from straight up. The highest power so far has been 62,981 mW/sq m. I have many readings above 10,000 mW/sq m. I am using relatively cheap RF meters, yet this doesn't make sense even when allowing for large inaccuracies. I have been regularly detecting the
Hi I want to use SMPS for Raspberry Pi 3 Model B and display but we need type B usb cable for supply. How can I customize USB cable for it? I have cut the one USB cable and there is 4 wires. 1. GND 2. +5V 3. Data+ 4. Data- I have connected GND to the GND of SMPS and +5V to the 5V of SMPS. And gave power to RPI and display but after s
Hello Forum, I did post synthesis simulation on netlist generated for two different technology nodes(28nm & 40nm) for the same design. The post synthesis netlist simulation worked for 28nm technology node, but it didn't work for 40nm node. The design met timing in both technology nodes. I checked the library setup and everything looks good. I
Dear friends, below are the suggeted three connection of dummy transistors to the cascoded circuit. In the first two schemes the dummy transistors are off as thier VGS tied to zero. However, in scheme 1, the drain of the dummy transistors are connected to the drain of the matched transistors. Thus it adds parasatic capacitance. This proc
Hi, Curiosity: I am trying to understand Li-ion cell charging, not a battery pack which needs charge balancing. Have read a few web pages and pdfs so far. I have understood the following: > Ideal usage (i.e. discharge) temperature is 18C to 21C. > Discharge to ~10% to 20% and no lower. > Charge to ~90% or is 100% fine? > Allow to disch
The test_se signal is connected to the TE pin of my ICG cell. I already issued the command set_dft_signal -view existing_dft -port test_se -type ScanEnable -active_state 1 -test_mode all but the tool still treats the value of the test_se port as X. 157557 157558
why is write delay low for 6T SRAM cell compared to 8T SRAM cell ?
I need help with NIMH Button cell battery I want to Trickle charge this battery for 5 years on my smoke detector alarm stand buy current is 40 mA here is my schematic /circuit I use this is my calculation please tell me if I am right on my calculation 10.4 volt /8.4 volt =2 volt/ 1k8 resistor =1.1 mA Please advise me if you can Thanking you in
I am trying to simulate a 2.6-cell resonant cavity in CST, and I need to fill the cavity with vacuum. As far as I can tell I have completely sealed the cavity, but when I try to fill it with vacuum the surrounding space is also filled with vacuum. How can I add vacuum only to the interior of the cavity?
Hello, Is it possible to do circuit HFSS cosimulation when I am planning to use floquet port for unit cell of metamaterial structure part simulation. Thanks
Hi, I am looking for Mentor compatible footprint or cell for the following two 1- SDRAM - MT41K256M16 and 2- Flash - S25FL127S. How to find ?
Can simulator like ncverilog simulates the metastability behavior of CDC circuits? How to do simulations with metastability models (RTL and gate-level)?


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