Search Engine

Generic And Help

Add Question

69 Threads found on Generic And Help
Along with your 70cm of forward cable, you also probably have a similarly poor ground return. A generic power MOSFET driver could certainly slap that load around, and this might help with duty cycle distortion (which in some logic families might come from the drive strength asymmetry of the outputs). But I'd first recommend looking at (...)
You may need to resort to simpler days of printer communication. Printer specs would say 'Epson compatible', which told you it obeyed generic commands. It was common in dot-matrix printers and early inkjets. You got basic printout even without the drivers. You might succeed with a printer like that. (However it will be hard to find an (...)
THe following might help you. The READ and WRITE codes are different, but you can easily combine them. entity rx_buffer is generic (WIDTH : integer := 2); port ( clock : in std_logic; n_reset : in std_logic; rxbuff_en : in std_logic; rxbuff_wr_en : in std_logic; rxbuff_
Hello, The following code results in the error under determined model and the simulation breaks off. How should I remove the error. I have coded in Hamster Vhdl. I would appreciate any help. entity MEM is generic (-- Initial state (between 0 and 1) X0 : REAL := 0.1; R_OFF : REAL := 16.0E3; (...)
You could get precise information on specific devices datasheets rather than at generic tutorials. Moreover, you will note that in general SPI data frame formats varies from a device to another more than if compared to the same kind of function that uses I2C protocol.
I would suggest you read up on generic information relevant to RTOS. It'll be easier once you're accustomed to the terminology and methods.
You should look at the design rule manual: there will be a chapter on Capacitor and Resistor layouts. if you want generic understanding..... this book will help.. The Art of Analog Layout (2nd Edition) Paperback – July 4, 2005 by Alan Hastings
Hi I want to work on NOC router architecture,so I use Atlas tool to create VHDL code of my NOC. for first test,I made a 4x4 Hermes NOC,and I tried to synthesis it with Xilinx ISE 14.7,but I received this error:"RouterBR.vhd line 51:generic
has not been given a value.",I don't know how can I solve it. please help me
Show your code and ask questions. Asking for generic help about _________ subject won't get you very far.
Hi guys ! I have a big problem with my code about generic question : How is that the program will be generic ?! Can you help me plz library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity correla is generic ( longueur : natural :=8 ); port ( clk : in (...)
Looks like something real generic, without markings. That probably means you get to figure out your own specs and source something "good enough". Although you might get lucky and on desoldering, find a clue or at least a designator that, if you're extra lucky and turn up a service schematic, might let you trace back to a (...)
Another "benefit" to FPGAs is their flexability. You could build a generic board with features to suit several customers and build different firmware for each customer, or "future proof" your design, getting a basic model out faster and upgrade the design with extra features later. Obviously this comes at the cost of power, but for small (...)
Hi guys, Can any one help me with the error for the below generic code for mux, please: library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; use IEEE.std_logic_unsigned.all; --use IEEE.numeric_std.all; -------------------------- -------------------------- package type_def_pack is constant s: integer := 5;
9820 probably means it was made in week 20 of 1998 but it bears no manufacturers ID and the other number is almost certainly a stock number rather than a part number. You stand very little chance of finding a data sheet or even a generic number for it. Quite possibly it is a custom part and only the original manufacturer (...)
could anybody help me why do we need parameters in generic design or is there any other way for generic design other then parameters ....... Any side effects of using parameters ..... I am only asking in terms of digital design ???
How can parameters(generics in VHDL) be included in SystemC? Right now I am trying to convert a code written in VHDL to SystemC. The VHDL code has some generics(parameters). How can I convert them to SystemC code?
Actually the proper way to apply accurate delay is by using timers. honey 77 has provided an example of that targeted to a CortexM based cpu (he has deleted the post apparently) but the problem is that the OP has not provided enough info on the mcu he intends to use, vendor and model For a generic delay milind.a.kulkarni routine would work but you
As Tricky said, port map, configurations, generate, generic all these in VHDL help user design a piece of code which can comply for many needs. For example, a user may design a small VHDL design with 32-bit interface, and the other user may want to use 64-bit. If your code uses these types for all definitions, your code can very easily be (...)
The part belongs to a "lost world" of analog and early digital audio signal processing components. Some generic parts, e.g. SSMxxx VGAs are still maintained for special applications, most apparently didn't produce enough interest and had been discontinued. Please consider that today's studio equipment is fully digital with lean analog (...)
when you instantiate a component, if you have created a component for it (you do not need to declare the component btw), you simply instantiate it like this: add : adder generic map (....etc PS, I notice in your component you have no generic, but on the entity you do. You wil need to fix this or you will get an error when you try and map (...)
Please help me describe the following t flip flop cascade in a generic fashsion : process ( clk_i , rst_i ) is begin if RST_I = '1' then temp1 <= '0' ; temp2 <= '0' ; temp3 <= '0' ; temp4 <= '0' ; temp5 <= '0' ; temp6 <= '0' ; elsif rising_edge ( clk_i ) then temp1 <= not temp1 ; if temp1 = '1'
I need help how to interface GLCD (LM3229 or LM240128TCC) which available in the market I want the generic solution not any micro controller solution. the way to configure pins ,how to write text and shift and how to draw (using equation ???), I don't want to use any library as I want to do it myself or any open source (...)
Clock generation is performed just by hardware built-in module, and configuration registers. PCB layout guidelines are provided on datasheet by uC manufacturers. Que question is a little bit generic. +++
you can chose the same components from proteus. If you are using version 7.8 there is a model for temperature sensor. The lcd you need to chose is 16X1 \16X2 lcd. Led shouldnot be generic.
What device class are you using?? HID, generic?? What is your endpoint type?? When you say you read the 2nd time say in PC1. Have you sent 2 packets from PC2 or have you just sent 1 and you're trying to read the endpoint which does not have data??
The "automation" is very generic description, you have to explain what you have in mind to build, what will it sense and what will it control. IR sensor to do what? Alex
In your cmd file you must assign the -heap and -stack size. Not sure about 6455 but some generic values can be -heap 400 -stack 2000 Change these number until it works
I and others can help with generic PCB design guidelines. For specific Allegro questions, there are others with much more experience of that product than myself (nearly 3 years since I used it) as I use Cadstar. As to vias, where possible for routes I try to minimise them, but with todays high count BGAs etc you can get via density of (...)
Hi all, I am trying to interact with the ICAP controller on the Virtex5 and I am not really successful so far. The primitive for the ICAP controller looks as follows: ICAP_VIRTEX5_I : ICAP_VIRTEX5 generic map ( ICAP_WIDTH => "X32") port map ( clk => clk, ce
Since this is an IC tool, it's not really set up for BOM generation. If you used a lot of generic components you would get only "analogLib inductor" and not values, off a schematic hierarchy tree printout. I guess you are not up for good old fashioned manual bookkeeping?
Hello, I am using altium 7 to design an H-bridge. I wanted to create a single schematic for a generic gate drive, and use 4 sheet symbols referencing the same schematic to implement my H-bridge gate drive. Is there a way to utilize sheet symbols in this manner? I have yet to found a way to do this, and my work around has (...)
I did my coding in verilog and synthesized with DC (synopsys). I am using synopsys 90nm (generic) downloaded from synopsys site I want to get layout for it. When I am trying to use Encounter it is giving an error. Saying SOCSYC-***** Can anyone say what I have to do ot o resolve it. Thanking you, RamesH
Hi, The width of the variable 'acc' depends on the generic M. As you use 'LEFT to assign a value to acc, the bit number of this assignment depends on the generic M and can be different for several instantiations of this fir_test and is therefor not "locally" static. Devas
I did my coding in verilog and synthesized with DC (synopsys). My library is synopsys 90nm (generic) I want to generate layout for it. When I am trying to use Encounter it is giving an error. Saying SOCSYC-***** Can anyone say what I have to do ot o resolve it. Thanking you, RamesH
I would like to use Matlab to draw a geometry and then save it in dwg or dxf format to import into HFSS. Does anyone have a code to generate dxf or dwg from a generic geometry like a square? Thanks in advance for your help.
Hi everyone, I have a problem regarding connecting my ip to the npi port of mpmc. I am a new starter to EDK, so I would really appreciate it if you could be so kind to help me out. I have successfully connected my own ip to the npi port of mpmc (such as add generic and port to my toplevel and modify the mpd file as (...)
Hello, can anybody help me with Synopsys Astro and its generic 90nn library? I started learning Synopsys Astro recently But I find that Astro is a very big tool. Its user guide is 800+ pages long. I wonder whether you can share some experience of learning Astro in a quick time. So far, I have tried the Recommended Astro Script-based (...)
The triangle is a generic logic buffer (3-15V means your options are limited to B-series "CD4000" though). Or discrete circuitry. How about this?
hi, i want to implement a block rom with generic read width and read depth in vhdl.i'm using modelsim se.Can xilinx core gen block rom be used to have the generic read width and depth or should a vhdl code be written to infer block rom.The design is to be synthesized in xilnx virtex 2 fpga.
You may have to dig more. I think if you use matlab with xilinx system generator or synplify dsp, you can generate verilog and c code from the system generator's or synplify dsp's block. But this is a very specific example and not generic
Although there are some special sensor signal conditioning ICs, generic OP cicrcuits can be better adapted to your needs, I guess.
You will need to create a pin with a property "GlobalSignalName" (This property is amongst the pre-defined). My suggestion is to create a generic pins and then add the voltage or netname as the value for this property.
Looks like you are using 'ROM" in your design and try to simulate it. If you can open the primitive, you can find one generic which points to the "mif" file. For simulation, you must put the mif file to the correct dir.
Can you be more specific on this topic? It is too generic. Be specific and maybe some users may help you. cheers F :)
Hi, I need to write an SPI driver in Linux. The Target board is having SPI controller and it is going to communicate with external devices thru SPI. If there is a generic SPI driver available, I can customize for my target platform. Can anybody help me? Kars
hi, all I am RTL coding with mixed language and I am confused by a problem. when writing a Verilog HDL program, I want to instant a component defined in VHDL, but in the VHDL, there is some "generic", how can I pass the value to these "geneic" in Verilog. Plz help me, thanks very much. Use Verilog parameters
Here is one solution but its not generic. May be ur looking this for 3 phase inverter?? module shifter ( // Outputs A, B, C, // Inputs clk ); input clk; output A, B, C; reg count = 0; assign C = |count; assign B = |count; assign A = |count; always @(p
Hi colleagues, I would like to get vga, sound drivers 0f win98 for Mebius PC-PJ2-S2 sharp notebook. Thanks in advance Try to find out what chipsets are used for VGA and sound, then try to use generic drivers. You can try to get information using "Everest" or "Sysoft Sandra" or some similar software that inspects your P
Well, the standby power supply is to provide the power for the remote control receiver. If there was no standby power supply, your remote would be useless. Driver IC -- what do your mean here? "Driver" is such a generic term. Do you mean like a MOSFET driver? The transistor driver could be driving the MOSFET for the flyback power supply (...)
when i transport edif from synopsys to cadence , i met the problem that is "External Library 'generic.sdb not found' " .HOw can deal with it? who can help me? Thank you very much !