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feko wire problem , hard lvs , hard macro , hard macros
4 Threads found on Hard Wire Problem
Hello, you may be familiar with the situation. You have old light wiring in your house, so there's one live wire and one wire going to lightbulb. And you want to roll your own smart switch connected to wifi or controlled by remote control. So you obviously miss the neutral wire and try hard to overcome this (...)
Interesting problem. Maybe the approach shouldn't be what wire to use, but how to protect the wire from the salt water. There are water-tight connectors available, maybe you should look at those. Without knowing more about the physical aspects of your design, it's hard to speculate. Maybe encase your connections in (...)
hi friends,i got another MB with no display problem.a hard disk fall over I/O ic.and its pin got damaged i removed it.and turn on MB without I/O:-D.i turn on MB forcefully ie {shorting the smps black green wire}.i had change RAM,PROCESSOR & SMPS. i tried with pci,agp card tooo. 89960
twocmplement and mul_unsigned don't exist in the Verilog language. Why don't you simply let the compiler do the hard work for you? (assumes Verilog 2001) reg signed a=123, b=-77; wire signed y = a * b; Gives result -9471