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8 Threads found on edaboard.com: Hspice Vec
I don't think this is possible with hspice. You should create this input by circuit design or via a behavioral/functional (A)HDL model.
I am using .vec to include vector stimuli in my hspice simulation. For example, .vec "stimuli.hvec" I need to test multiple stimuli in my hspice simulation. So I tried: .alter .vec "stimuli1.hvec" .alter .vec (...)
Hi, I am using .dat file to generate the input waveforms. the .dat file is included using following syntax in hspice simulation file. .vec 'input_vec.dat' In this .dat file I want to use more than 4-bit data as input and for that I declared its radix as 5. radix 5 vname in1<> io i But when I simulate it says (...)
How can i desing an SRAM chip and simulate it.:cry: By design of chip i mean, all cell arrays,column decoders,row decoders,sense it good to do this in hspice ??.If i do in hspice then testing the working of the design will be difficult.I have to write .vec file fo different inputs If i model the SRAM in verilog, then i will get the
any help regarding the format of .vec file (it is a stimulus file in hspice simulation)
U can use .vector statement in hspice as following: (1) In hspice file, add a statement: .vector "PATH/test.vec" (2) In "test.vec" file, write the following code (here,7bit vector is used): radix 1111111 /* the radix is binary for each vector (...)
Quote: Analog_starter Hi, how can I do SNR simulation by hspice ?? BTW, in spectre can I add .vec file into it ?? Using .fft in hspice can do fft simulation and get THD. And .vec file can be used too. But for SNR, i don't kown how to simulate it.
u may generate it using vec file in hspice