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not ifdef , ifdef , ifdef and verilog , verilog ifdef
4 Threads found on edaboard.com: Ifdef Value
use generics. `ifdef is not really recommended for verilog anymore, you should use parameters instead.
What you are trying to do is possible, but not the way your approaching it. The problem with your code is the `define A (SEL==1'b0) & `ifdef statements are evaluated during compile time and not run time. I'd recommend using parameters & generate statements.
They are not the same. You can use '#if' with any expression, and you use '#ifdef' with macros. #if expression If the value of expression is true, then the code that immediately follows the command will be compiled. #ifdef macro If the macro has been defined by a #define statem
Hi ourarash is correct Parameters allows you to have configurable hardware at the compliation time. defines manily are used as a complier directive (to be used with `ifdef and `ifndef) Thanks Haytham