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28 Threads found on edaboard.com: Input Capacitance Measure
Hi everyone, Can someone explain to me what's the best way to simulate and get the input capacitances of aa mosfet? More, if I want to know the Cgs and Cgd how I can I do that? All this using cadence. Regards.
Here I used HF CT to measure current on ground strap and large capacitance transformer ( not shown) to measure 50~100kV voltage impulse with C ratio that scales voltage down to safe levels for 50 Ohm termination inside scope. High quality coax is critical. Here V impulse is 10V input 50 Ohms or 2 watts which when (...)
Hi everyone, I am a newbie in Cadence spectre simulator. I have a 2 ports network and I try to plot the input equivalent capacitance vs. frequency. In ADS I use equation: Cin = imag(Y11)/2/pi/freq. But I don't know how to insert that equation into Cadence. I only used a basic SP analysis. I have read many thread but I cannot find the answer.
The following demo code utilizes the CTMU to measure the value of a capacitor attached to an ADC input channel: Charge Time measurement Unit (CTMU) In this code example, CTMU module in PIC18F4685 is used to calculate the capacit
Hi i am trying to measure the input and output capacitance of a buffer stage (for example) as i need to measure several other stages i set up the following circuit 104476 and i set the input voltage to 1.2 with AC Magnitude and Amplitude to 1.2 , also vdd is set to 1.2 then i calculated Zin = (...)
Hi, You can measure the delay between Buffer input and Buffer output.. And actually it is a sum of inverter delays.. Thanks
If this capacitor is series you should add an inductor in parallel.If it's parallel, you should add an inductor in series. Depends on capacitance configuration. But I'm not sure that the input impedance becomes purely capacitive.Because SAW filters generally have an input impedance with a real part by their nature. There might be a (...)
No load instability is common in SMPS and 10% pre-load activated by current sensor, may be needed. Overall open loop phase margin should be analyzed to improve stability to determine which capacitance and/or input ESL affects the results. Alternatively put on the minimum load for stability and measure the % overshoot on step loads and (...)
I remember doing something similar once, but there is a simpler way to get the input capacitance of an inverter if you'd like to do back-of-the-hand gate delay calculations and stuff. Create a chain of inverters as shown in the figure attached. Now, you can use the optimization routine in HSPICE or vary Cdelay till the delay from nets c to g (c
Hi, I'm trying to measure input capacitance of simple inverter, and I have some problem... Using the following statement: .meas ac Cdb max(I(Vin0)/(2*3.1415*frequency)) Result of this measure is ok, but it is in dB, and I don't know how to translate it to linear scale. I tried something like this: .meas ac Cin (...)
Use a VNA to measure the input impedance and design a matching network. Or at that frequency you can rely on the fet device model from the manufacturer.
I don't know the LM2101: what is it ? However where do you measure the distorted waveform, at the output of the LM2012 (gate of IRF520) or at the output of the circuit (I presume the 50 ohm resistor) ? In the first case, take into account that the IRF520 has a quite high input capacitance (350 pF), it could be that LM2101 is not able to (...)
If you measure V1 with a DVM, this will have a 10 megohm input impedance so the extra current, will be very low, and as you know its a 10 megohm resistor you can compensate for it in your calculations. Frank
I'm using SP720 for analog circuit protection in a number of instruments since about 10 years. I must confess, that I didn't yet measure the devices crosstalk capacitance (input pin to input capacitance), but I won't expect a value above 0.1 pF or so. In other words, the external circuit crosstalk (...)
Hi people, I wanted to ask whether anyone here could suggest me the method to measure the input capacitance of a MOSFET in cadence or in ADS. falcon
Hi everybody. Is there anyone how can guide me to measure input parasitic capacitance with HSpice simulation? Thanks in advance. Alireza
Without a small capacitor across the 10 Meg resistor, the circuit will be unconditionally unstable. A resistor resistor between OP and uP should be used to avoid input overload. An additional filter capacitor is suggested to reduce noise. You should also check the voltage at the uP input with a multimeter or oscilloscope.
The question is about a real measurent rather than simulation, if I understand right. In this case, the usable resistor frequency range is mainly limited by it's parallel capacitance. For 1 MOhm, it will be a few MHz at best. On the other hand, the "current source" resistor must be large compared to the TIA input impedance in the frequency (...)
Do a simple tran.. measure the input cap of both the switches or just the second switch.. that can be considered as the load for the prev stage..and then resize your previous stage to meet ur timing.
Hello Edaboarders, I need help regarding the using of Spectre to know: How to mesure gm of a circuits ? How to measure the input/output capacitance and resistor of a circuits ? How to plot the caracteristic of a varactor ? 50 pts to be given for helpers. Merci.