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# Integrator Noise

50 Threads found on edaboard.com: Integrator Noise

## Question about integrator noise in OTA

Hi, I have a stupid question about integrator noise.. Say an OTA has an input-referred noise Vn at it's positive input, and be connected into integrator, the transfer function (1/SRC) has infinite gain at DC, ideally. So what would input-referred noise Vn be at OTA's output? If I give input a (...)

## The principles of delta sigma modulator

It is very difficult to say in a simple paragraph. However, the key is the signal is almost untoched and noise is shaped by inserting integrator in front of comparator (Assumed that LP)

## How to extract performances of a Gm-C integrator?

My question is how to extract the nonlinearity of a Gm-C integrator, i.e. THD (total Harmonic Distortion). SNR (Signal-to-noise Ratio) and SDR (Signal-to-Distortion ratio)? As my knowledge, these perforamnces are from the FFT of a signal. Does it need a tranisent simulation??? In some literatures, the performances 1dB compression and IP3 can

## How to simulatue a Gm-C integrator?

My question is how to extract the nonlinearity of a Gm-C integrator, i.e. THD (total Harmonic Distortion). SNR (Signal-to-noise Ratio) and SDR (Signal-to-Distortion ratio)? As my knowledge, these perforamnces are from the FFT of a signal. Does it need a tranisent simulation??? In some literatures, the performances 1dB compression and IP3 c

## Does anyone know how to minimize the charge injectioin noise

hi guys, I've been working on a sc integrator for a 16bit sigma-delta ADC. while when i doing the bootstrap switches, the charge injection noise and clock feedthrough give a lot of noise, even the charge injection can be common mode rejected, there is still body effects (nonlinear) and clock feedthrough. does anyone who did this (...)

## Design of switch cap filter?

The characteristic parameters of op amp is relative to the loading and feedback factors of integrator. In the meanwhile, the settling accuracy and noise requriement are the factor to determine the op amp. I think the design of op is the core design for SCF.

## Need help for capacitor layout

why not reduce ur total capacitance ? why did u choose 9.6pF for ur integrator ? for noise issue, or matching issue? by the way, what do u mean "5-bit coarse quantization", I have not heard about that term from books, is it a new technique ?

## delta modulation and sigma delta modulatiom between differe

In contrast to sigma-delta modulators, delta modulators have their integrator(s) in the feedback path and not in it forward path ( input - integrators - adc) . Therefore, no noise-shaping is done. Hence, it isn't usefull for oversampling converters.

## ADC reference voltage - some questions

the 4Kohm resistor has 2 reasons: 1. it's the reason described by petarpav. 2. if you use internal ref, the 4Kohm resistor and external cap (common 100nF), make the noise rejection of internal refference. (work as RC integrator)

## how to make noise analysis from 100Hz~100MegHz with hspice

just as title said.I want to make a noise analysis of a integrator by hspice.Can the following sentence works it out? .noise V(out) Is DEC 10 100 100Meg and second a analysis result in the *.lis file,there are: **** total output noise voltage = 3.2205m volts **** total equivalent input (...)