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237 Threads found on edaboard.com: Internal Error
I am using ICD3 and MPLABx version v3.30,v3.51,v3.55 and MPLAB IPE similar versions the connection s and all things are okay external/internal oscillator config bits each and everything i tried still it gives the error "Failed to Program" also changes several memory ranges and different things but the same error occurs every time i also (...)
Hi, This little crystal oscillator I have designed by trial and error, uses crystals or ceramic resonators to oscillate at HF. There ia a "hitten" capacitor formed by the internal capacitance of the gate-source of the FET. When I set the source trimmer at extreme ends (especially at low values, max OSC gain) the oscillator changes frequency by a f
Hi there, I am trying to simulate my antenna in HFSS and i am getting this error : Port refinement, process hf3d error: Port 2 is assigned to an internal face. Only allowed with lumped ports I have read that if you are trying to simulate a port inside a radiation box you have to put a pec cap on the port. Is that true? And how do i put (...)
You can treat it as an op amp, which it basically is (with an on-chip voltage reference tied to the + input, and usually a way-asymmetric output stage, and the feedback all internal). Just put your AC=1 stimulus between the reference and the error amp input, and proceed as normal. I would recommend not bothering with trying to break the feedbac
Controller- PIC16f676 Debugger - PICKIT2 Generated hex file via Mikroc compiler During code flash via PICKIT2 it says Invalid OSCCAL value. What i learnt about OSCCAL value is: internal RC oscillator is not as accurate as crystal. To compensate for the inherent inaccuracy, microchip uses a calibration scheme. The speed of the internal R
The same diodes + voltage divider level shift circuit can be found in many controller ICs with internal error amplifier. May be they just copied a design template. I don't see the purpose of asking "what's the purpose of". Just take it as is. The specified characteristic is achieved with this circuit in place.
hello all I want to simulate a simple data acquisition system in matlab simulink. I use xilinx fir compiler v6.0 and when i ran the simulation gave me this error: error reported by S-function 'sysgen' in 'DAQ_simulation/FIR Compiler 5.0 ': An internal error occurred in the Xilinx Blockset Library. this is my system (...)
Do you mean that you want Vout=2*Vin? Or that you want an {error amp to output} gain that ensures stability given the op amp frequency response, output filter and feedback network details? You want high enough loop gain that load regulation is decent and PSRR is driven down to amplifier-internal limits, but not so high that you haven't gone t
you didnt tell us what the error is. Assuming you have fixed_pkg in your simulator, then it has no syntax problems and will simulate just fine (if you count a single internal signal with a fixed number fine).
This came from a YouTube tear-down and well documented. His only error was measuring AC current with a DVM that internally uses P-P converted to RMS wit the internal assumption of a Sine wave ( common measurement error) He adds a tiny diode to the PIR to make it retriggerable by motion to extend time and prevent (...)
Hi all, I am trying to simulate a Vivaldi antenna and I keep getting the following error: HFSSDesign1 (DrivenTerminal) Definition Mesh, process mesh3d : Unexpected internal software error code -1073741819 with module id 0. (11:33:46 AM Jun 02, 2016) Simulation completed with execution error on server: (...)
Hi guys, I am trying to simulate a Vivaldi antenna and keep getting the following error message: HFSSDesign1 (DrivenTerminal) Definition Mesh, process mesh3d : Unexpected internal software error code -1073741819 with module id 0. (11:33:46 AM Jun 02, 2016) Simulation completed with execution error on (...)
Hi, every one! I am new member. Help me, please! I have a problem and need your helps. I want to build two NIOS-qsystem and run two independent softwares on them. But have an error when I try to build hardware program. error "14703 Invalid internal configuration mode for design whith memory initialization" Anyone else has met (...)
Hi Members I am trying to excite a simple patch antenna using Grounded Co-Planar Wave guide Structure (GCPW) by the techniques shown below in Fig.1. I do so but receive the error of "Port 1 is assigned to an internal face". Can someone kindly assist me in assigning wave guide port to the GCPW structure in HFSS simulator. I have
Hi there, I an designing 10-bit pipeline ADC in HSPICe. It works good with ideal switches. However, when I replace the switches with the ideal one, face the following error: **error** internal timestep too small in transient analysis Does any one knows about the reason? Please kindly let me know about the reason. Thanks
OTAs are simple, easy to compensate (shunt C on output) and easy to slap around with their current limited output (e.g. soft start, current limit functions). Their gain tanks with any resistive load, but internal to a CMOS IC there may be none (just C pretty much). LDOs operate the pass FET in linear region -when low supply headroom- but this is
Hello, I have a design that has some modules in a top file. Each module individually has some internal sub-modules. When I am trying to put the AREA_GROUP constraint for the sub-modules intended in those modules, it seems that the ISE does not recognize them and I receive the folowing error message. Can anybody help me whether it is possible to
you do not show whole circuit so it is difficult to help you. But your connection to comp pin is wrong, it should be as an integrator, you are just using the internal error amp as an amplifier.... Also, your vin is a pulsed voltage? Also, you use 1n4007 in RCD clamp, this not good, you must use ultra fast diode there. Do you know uc3844 is 50%
The error is self explanatory. You are using an inout for the RAM and are assigning data using both the FSM (e.g. data<=ho;) and the ram_hough instance. inout doesn't exist inside an FPGA since the Virtex II/II-pro parts, which had internal tri-states. inout should only be used for I/O which do support bi-directional ports. Use a RAM model that ha
The following are the most common current mode full-bridge SMPS control chips in the world for 90-265VAC input SMPS?s?. UCC3808, LM5030, LM5037 , UC3846, LTC3721-1 None of these chips has output overload protection. By ?output overload protection?, I mean that if the error amplifer internal to them is railed high for more than 1 second,