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22 Threads found on Iprobe Stb
You didn't reveal which analysis tool you're using. If it is Cādence SPECTRE, insert an iprobe instance in series with Cf, run an stb analysis and plot gain & phase.
I always use a vcvs to take the input difference voltage and create a single ended ground referred value. Also use that voltage in my own gain/phase plots, having found the iprobe / stb to be unreliable (not often, but often enough to ruin a MC run consistently, no idea why and no way to tell whether - except when you get whacked outliers).
i have designed a low power beta multiplier refernce (70nA) as shown. The opamp is a 5T diff check for stabilit i broke the -ve feedback loop and plugged iprobe from analoglib in cadence. stb analysis shows phase margin of 20 deg and gain margin of 14dB with C=2pf. I m not able to achive better phase margin even after shifting the mirror po
now how to calculate the gain and bandwidth of common mode feedback loop.....????? Break the loop at some point with an iprobe component from analogLib and run stb analysis.That's all! no of harmonics=1 (don't know how to set this Can Anybody tell me??) Dig into SpectreRF manual (it is located in your cadence instal
Your circuits are topologically different in the compensation so why do you expect identical response? I'm not a real big fan of stb. When everything is right it's a handy shortcut. But determining -whether- things are right, is still easier for me using AC analysis and transient. Get the circuit working without the iprobe and then figure out wh
Hi, Is there anyway to simulate the PM of a single stage amplifier using iprobe? Does anybody knows a good paper on a stability of a single stage transistor amplifier (and not in terms of S-parameters). BR
HI I have designed a capacitive feedback OTA ( OTA is folded cascode single stage OTA with ideal CMFB). When I simulate the loop gain of OTA (using iprobe and stb analysis in cadence) I get a 'High Pass' response at low frequencies. I am not sure why this is happening. Please help to solve this issue. Thanks
There is an analysis option "stb" (stability) which with the iprobe "widget" does it all; you can plot traditional Bode plots or a margin summary. Otherwise it's make the gain expression, use the "cross" function to find the zero gain, use that value as the argument for value() on the phase expression. At least, I've found no "canned
I think the iprobe component could not be used to test fully differential loop gain and phase. You can insert large ind, eg 1GH in the feedback path, and use AC coupling capacitor to set AC input signal. The iprobe component can be used to test loop gain and phase when the feedback is at a single path rather than a differential path. For example,
I simulate cmfb with stb analysis of spectre. Add iprobe of analogLib, which aim is connection when dc analysis, is not connection when ac analysis
put an iprobe in series at the point where you want the loop to be broken and then do the stb analysis.
Hello Bharath.. Wht u have done is correct's breaking the loop virtually and it's one of the way for stability analysis... The easy way is connect the Vin- and Out put through iprobe (which can be found in analogLib) and add stb analysis ( what ever frequency range u want.) Vin+ is connected to a Ac Source with Ac magnitude =1
I use "iprobe" to analysis the stability of the BGR. Any other methods?
Hi all, What's the difference between iprobe and voltage source with dc=0 ac=1 in stb analysis? I did the stb analysis using iprobe and voltage source with dc=0 ac magnitude=1 to break the loop seperately. The simulation results are the same. What's the difference between them? Regards, Colin
Hi I've a question about pz & stb analysis of ADE. First, I've designed LDO(low drop out regualtor) with amplifier. Then I anlysis stability of LDO with 'iprobe' & stb analysis. That is ok. (loop phase & gain plot OK) But When I perform pz analysis, There's an unmatch point between pz & stb analysis. (In pz, I (...)
Are you trying to get a loop gain plot like bode plot ? If that is what you want, you should add an AC test signal or "iprobe" into the feedback loop. Please refer to the following link. As for R1, is there any simulation problem like no dc path from your inverting node to gnd if you remove R1. For mo
If you use spectre, you can break the loop & place 'iprobe' in analoglib. Then run stability analyze(.stb) It shows closed loop gain & phase curve.
hello, for the AC sim of LDO, you can use RC technique described in philip allen's book (cmos analog circuit design) or iprobe with stb analysis in cadence spectre. both simulations will find open loop gain and phase margin of your LDO. make sure that pass device in LDO always operates in saturation region. hope this helps.
I have a problem with iprobe when put in hierarchy and then defined it in stb analys. ADE generate error window with title- "Choosen Analyses Form Error -specterVerilog5". And in window "Couldn't find component named /I33/I67/IPRB0" . I need gelp
Thanks to Middlebrook, his great double-injection method. Thanks to Tian and Kundert, you have iprobe and cmdmprobe in spectre. stb analysis is just one click away. You know all the basics of feedback control and the idea behind Nyquest stablity criteria. But, watch out! The key question is: have you broken all the loops at the same breaking po