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7 Threads found on edaboard.com: Ldo And Current Limit
I had some questions in ldo design when it comes to the error amplifier (EA) 1) Why is it advantageous to use OTAs when designing the error amplifier in ldos? I know that we utilize OTA when we are driving small capacitive loads and voltage amplifiers when driving high impedance loads. Since the output of the EA is connected to the gate (...)
Hi I'm working on design of Linear ldo.I have problem with in-rush current so i need to add a "soft start circuit" wiil give your suggestion on what kind of techniques are there? and How to overcome that problem. Thanks.
Hi all , Am designing a cap-less ldo/ While simulating at no load, stability of the circuit went totally loose. Although it is stable at any other load. Does anyone have an idea how to deal with this ? Should I use a certain compensation scheme for the OTA, although it has enough phase margin ?! Thanks in advance.
there must be a low dropout regulator (ldo) that can work with a difference of about 0.5v, maybe someone knows some models to recommend Alex
Dear all, Plz give some suggestions on current-limit circuit and short-circuit of ldo. Thanks!!!
Hi : Does any one have any the experience or papers on the design of current limiter and short-circuit protect for ldo ? The limiter should take the structure of monitering the gate voltage of pass device .
i would use a real charger IC, nim-h get really screwed up without current limit and overcharge limit. as long as the charger doesn't pull more than 500mA (the usb limit i think) any one should be fine. switchers are better than ldo, but it's up to you. try the maxim or linear tech sites