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44 Threads found on edaboard.com: **Logarithm**

32M = 32 Mbit? 32 Mbyte? 32M memory locations?
Anyway, first thing is divide total capacity in bits by # of bits in each memory location. Let's say for example you meant 32 Mbyte = 256 Mbit. Divided by 32 bits that is 8M memory locations.
Then you take **logarithm** of that number, divide by **logarithm** of 2, and round up to nearest integer.

Elementary Electronic Questions :: 12-21-2015 06:40 :: RetroTechie :: Replies: **1** :: Views: **588**

How many times will integrate?
119161
The only difficulty I see is the evaluation of \frac{1}{3x-2} because is always negative in the range
To avoid evaluate the **logarithm** of a negative number is better integrate
\int_{-.5}^{.5}{\frac{dx}{3x-2}=-\int_{-.5}^{.5}{\frac{dx}{2-

Mathematics and Physics :: 07-06-2015 22:19 :: _Eduardo_ :: Replies: **4** :: Views: **1189**

Do you know what value you have (Impedance or S11 - each of them are complex values)?
To use the plotsmithchart.m you need the impedance values, if you have the S11 you need to calculate the impedance from the (complex and without dB) S11.
With the formula you mentioned - 10log - you can calculate the **logarithm** of the mag

RF, Microwave, Antennas and Optics :: 12-16-2013 12:25 :: flanello :: Replies: **5** :: Views: **1114**

Hi,
I need to direct hardware implement **logarithm** from galois field(GF).
after search some patent, **logarithm** within GF(2^2m) is constructed from subfield GF(2^m).
all patent I found only show block view and no other detail step to show how those block come from.
I got one method by Glover, but Chinese Remainder Method(CRM) need to be a

Digital communication :: 11-12-2013 02:57 :: ffsher100 :: Replies: **0** :: Views: **555**

About the first question, the derivation of (7) and (8) from (6) is very simple; we have:
R=B*n*log2(1+g/gef) then
R/(B*n)=log2(1+g/gef)
by definition the **logarithm** is the exponent to which the base must be raised to have the number. That is "logb(N)=a" means "b^a=N" so, in our case the base is 2, the exponent R/(B*n) and the number 1+g/gef:
2^

Mathematics and Physics :: 11-09-2013 21:05 :: albbg :: Replies: **2** :: Views: **789**

Hi
I want to implement floating point **logarithm**ic unit
It is for double precision.
I have gone through following discussion on this forum.
so i think we can go for either LUT based or some taylor series method. or any other method..?
log(num)

PLD, SPLD, GAL, CPLD, FPGA Design :: 10-25-2013 07:38 :: seeker_123 :: Replies: **6** :: Views: **844**

Hi, all
it is said that for euclidean algorithm,its asymptotically time comlexity equal to log 2/(sqrt(5)-1) n, which reads as **logarithm** n based on 2/(sqrt(5)-1), why is so?
*** please help me!
- - - Updated - - -
G O D is the above* * *....
why is this not shown?

Mathematics and Physics :: 03-24-2013 22:33 :: W_Heisenberg :: Replies: **0** :: Views: **686**

Besides other ambiguities in your post, what does this mean:
I need to represent the values of the above equation in vhdl (256 entries) using 8 bits only.
Presumed you represent log (2) by a 8-Bit number (natural or decadic **logarithm**, by the way?), the product of 8-Bit exponent and and log(2) will be a 16-Bit number.
A fixed po

PLD, SPLD, GAL, CPLD, FPGA Design :: 01-24-2013 19:03 :: FvM :: Replies: **18** :: Views: **2479**

The issue arises when log 2 comes in for the exponent, but again when a look up table is used, my supervisor told me I could calculate log 2 using a calculator, convert the answer to binary and than use it to multiply it with each 256 different combinations of the exponent (as Exp=8bits). From here there will be many outpu

PLD, SPLD, GAL, CPLD, FPGA Design :: 11-08-2012 21:18 :: ads_ee :: Replies: **9** :: Views: **2585**

For my project, I need to write VHDL code for natural **logarithm**(base 'e').For simplicity I am planning to write code using log series. But ln(x)=(x-1)-((x-1)^2)/2+((x-1)^3/3)--- will work only when x<1. But my x values are real numbers >1. How can I implement natural **logarithm** then?
On a more theoretical (yet still

PLD, SPLD, GAL, CPLD, FPGA Design :: 10-01-2012 08:58 :: mrflibble :: Replies: **5** :: Views: **1035**

dear all
Can anybody give me VHDL code for **logarithm**. I need to do **logarithm** base e for real numbers which I represented in fixed point format.(16 bit, 8 bit for fractional part).

PLD, SPLD, GAL, CPLD, FPGA Design :: 09-19-2012 02:13 :: ammassk :: Replies: **3** :: Views: **714**

The fast way is to...
take the **logarithm** of your number. (Any base)
Subtract from zero (the log of 1). Or change the sign.
Take the antilog.
This gives you the reciprocal of your original number.
It's easier if your pic has a **logarithm** table.

Microcontrollers :: 08-31-2012 04:02 :: BradtheRad :: Replies: **1** :: Views: **628**

Hi,
Assume this equation: " t=((k*tms)/((i/is)^n)-1)"
for k=0.14 , n=0.02 , tms=1 ;
and " is " must get " 100 , 200 , 500" and the output must be a plot with x-axis named " i " and y-axis named " t ", also in **logarithm** scale.
For each " is " there will be different plot and I should plot each of them in one graph.
But the problem is I don't kn

Software Problems, Hints and Reviews :: 03-24-2012 09:30 :: nanock :: Replies: **0** :: Views: **558**

how does natural **logarithm** evolved (why choosing the value e)???
Thanks in advance

Mathematics and Physics :: 03-23-2012 16:16 :: karthiprime :: Replies: **3** :: Views: **953**

sir, i have generated natural **logarithm** base 2 using the formula ln(a) = 2 * arctanh((a-1)/(a+1)). i implement arctanh using logicore cordic. but i got errorneous result. plz suggest to correct my error

PLD, SPLD, GAL, CPLD, FPGA Design :: 10-21-2011 16:15 :: debalina :: Replies: **0** :: Views: **541**

sir, i have generated natural **logarithm** base 2 using the formula ln(a) = 2 * arctanh((a-1)/(a+1)). i implement arctanh using logicore cordic. but i got errorneous result. plz suggest to correct my error.

Software Links :: 10-21-2011 04:32 :: debalina :: Replies: **0** :: Views: **16**

Remember mathematics and the advantages of the **logarithm**: Multiplication is translated to simple addition.
Now think of a communication chain with various systems contributing to the overall attenuation (for example a satellite link).
The calculation of the overall attenuation including influences of system changes is simplified if you have an over

Elementary Electronic Questions :: 04-18-2011 08:46 :: LvW :: Replies: **5** :: Views: **3651**

I need Verilog coding of **logarithm** calculator
(input up to a 32-bit number and get its base 2, base 10 and base 'e' logs)
---------- Post added at 23:59 ---------- Previous post was at 23:52 ----------
Thanks in advance

PLD, SPLD, GAL, CPLD, FPGA Design :: 10-17-2010 18:59 :: bibliomaniaster :: Replies: **0** :: Views: **2528**

Take a look at ....

EDA Jobs :: 05-11-2009 03:34 :: RBB :: Replies: **4** :: Views: **6913**

Hi!!
I would like to implement Taylor Series (**logarithm**) with VHDL. Could you provide some examples that how should be implemented?
Thanks in advance!!

EDA Jobs :: 05-11-2009 02:44 :: jose2 :: Replies: **0** :: Views: **1957**

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