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32M = 32 Mbit? 32 Mbyte? 32M memory locations? Anyway, first thing is divide total capacity in bits by # of bits in each memory location. Let's say for example you meant 32 Mbyte = 256 Mbit. Divided by 32 bits that is 8M memory locations. Then you take logarithm of that number, divide by logarithm of 2, and round up to nearest integer.
How many times will integrate? 119161 The only difficulty I see is the evaluation of \frac{1}{3x-2} because is always negative in the range To avoid evaluate the logarithm of a negative number is better integrate \int_{-.5}^{.5}{\frac{dx}{3x-2}=-\int_{-.5}^{.5}{\frac{dx}{2-
Do you know what value you have (Impedance or S11 - each of them are complex values)? To use the plotsmithchart.m you need the impedance values, if you have the S11 you need to calculate the impedance from the (complex and without dB) S11. With the formula you mentioned - 10log - you can calculate the logarithm of the mag
Hi, I need to direct hardware implement logarithm from galois field(GF). after search some patent, logarithm within GF(2^2m) is constructed from subfield GF(2^m). all patent I found only show block view and no other detail step to show how those block come from. I got one method by Glover, but Chinese Remainder Method(CRM) need to be a
About the first question, the derivation of (7) and (8) from (6) is very simple; we have: R=B*n*log2(1+g/gef) then R/(B*n)=log2(1+g/gef) by definition the logarithm is the exponent to which the base must be raised to have the number. That is "logb(N)=a" means "b^a=N" so, in our case the base is 2, the exponent R/(B*n) and the number 1+g/gef: 2^
Hi I want to implement floating point logarithmic unit It is for double precision. I have gone through following discussion on this forum. so i think we can go for either LUT based or some taylor series method. or any other method..? log(num)
Hi, all it is said that for euclidean algorithm,its asymptotically time comlexity equal to log 2/(sqrt(5)-1) n, which reads as logarithm n based on 2/(sqrt(5)-1), why is so? *** please help me! - - - Updated - - - G O D is the above* * *.... why is this not shown?
Besides other ambiguities in your post, what does this mean: I need to represent the values of the above equation in vhdl (256 entries) using 8 bits only. Presumed you represent log (2) by a 8-Bit number (natural or decadic logarithm, by the way?), the product of 8-Bit exponent and and log(2) will be a 16-Bit number. A fixed po
Hello everyone, I am working on a project titled "FPGA-based floating-point logarithm unit.? I chose an architecture which I found on the net by the title ?Efficient Floating Point logarithm Unit for FPGA? link is: I was a little confused on what library package should I use when computing (e
For my project, I need to write VHDL code for natural logarithm(base 'e').For simplicity I am planning to write code using log series. But ln(x)=(x-1)-((x-1)^2)/2+((x-1)^3/3)--- will work only when x<1. But my x values are real numbers >1. How can I implement natural logarithm then?
dear all Can anybody give me VHDL code for logarithm. I need to do logarithm base e for real numbers which I represented in fixed point format.(16 bit, 8 bit for fractional part).
The fast way is to... take the logarithm of your number. (Any base) Subtract from zero (the log of 1). Or change the sign. Take the antilog. This gives you the reciprocal of your original number. It's easier if your pic has a logarithm table.
Hi, Assume this equation: " t=((k*tms)/((i/is)^n)-1)" for k=0.14 , n=0.02 , tms=1 ; and " is " must get " 100 , 200 , 500" and the output must be a plot with x-axis named " i " and y-axis named " t ", also in logarithm scale. For each " is " there will be different plot and I should plot each of them in one graph. But the problem is I don't kn
how does natural logarithm evolved (why choosing the value e)??? Thanks in advance
sir, i have generated natural logarithm base 2 using the formula ln(a) = 2 * arctanh((a-1)/(a+1)). i implement arctanh using logicore cordic. but i got errorneous result. plz suggest to correct my error
sir, i have generated natural logarithm base 2 using the formula ln(a) = 2 * arctanh((a-1)/(a+1)). i implement arctanh using logicore cordic. but i got errorneous result. plz suggest to correct my error.
Remember mathematics and the advantages of the logarithm: Multiplication is translated to simple addition. Now think of a communication chain with various systems contributing to the overall attenuation (for example a satellite link). The calculation of the overall attenuation including influences of system changes is simplified if you have an over
I need Verilog coding of logarithm calculator (input up to a 32-bit number and get its base 2, base 10 and base 'e' logs) ---------- Post added at 23:59 ---------- Previous post was at 23:52 ---------- Thanks in advance
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Hi!! I would like to implement Taylor Series (logarithm) with VHDL. Could you provide some examples that how should be implemented? Thanks in advance!!