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Loop Filter Synthesizers

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3 Threads found on edaboard.com: Loop Filter Synthesizers
I design a 10ghz frequency synthesizers with the skyworksinc spd spd1101-111,when i design the loop filter, i find i can't know the phase gain. anybody can help me ,thanks a lot.
wn=sqrt(ip*kvco)/(2*pi*N*C1).Fit in the other parameters like divider ratio, gain of the VCO and the loop filter capacitor. Overall the pump current is chosen based on noise requiremtns ,BW,lock time etc.You can refer to the book PLL frequency synthesizers by styewart to look at how a spec for a commercial PLL is specified. amarnath
How do i define the loop bandwidth for a PLL ? Is there a standard way of doing that ? Lets say i have to design a PLL whose tuning range is 6GHz, and the reference frequency is 100MHz. What factors does loop bandwidth depend upon? The loop bandwidth is needed to further design the components of the filter, but how (...)