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158 Threads found on Matlab Verilog
You cannot "plot" the equation in verilog-a. You need to build a module, simulate it and then plot the result. The equation can be witten as IADanilov said: y = x/(a*exp(-0.5*pow((x-b)/c),2))+d; you just have to define what the symbols are (real, integer...). If you just want to "plot" the equation you could use matlab.
Hope this helps -- Amr Ali
Yes, that is one way to go about doing it. The way I have done things like this in the past is to use the matlab model to produce known inputs to stimulate the verilog design. Then you can simulate the verilog design, collect the outputs and compare them to the matlab outputs. Given the same inputs, the two systems should produce
Hi all, I've bunch of 14-bit data points which I would like to convert in hex to use with $readmemh in verilog. Any clue how to do that? It seems there is no direct function to do that in matlab and Excel can not handle more than 10-bit data!! Thanks
Implementation of 2-DCT procesor using only cadence is posible or not......without using the matlab,verilog HDL.... How can give the input signal(vector) to the 2-DCT in cadence ? thanq...
Hi All, It has been a long time I read articals, download files, learn your experience here. Now it is time to share something. I just learned some delta-sigma modulator and did a simple Simulink model in matlab with 32-bit realization, then a verilog code 24bit realization with testbench. A beiefly documentation is attached. If any yo
Hi, I've done the correlation of the noise power of a 3rd order modulator. Its block diagram is shown below. I've two results to be compared: 1. Using closed-form formula and do integration. 2. Using verilog-HDL model and post process data in matlab to obtain the noise power. The results are respectively 0.47 and 0.5037. I would l
hi, Yes, you can convert matlab functions to hdl components(modules) using the matlab tool HDL Coder or accel chip for xilinx devices and DSP builder for Altera devices.
you could just write a simple matlab code that writes the input waveform in a file and use it in a vpwlf source.
Hi all, I Have verilog code and i need to include it as subsystem block in matlab. is it possible? If so how? Thanks Sudhir
Added after 1 minutes: pls send matlab code and verilog code for image read and FIR filter
Can I use verilog and matlab cosim in NC-verilog
I have a Sine Cosine ROM module which I generated from matlab using a half-precision function available from the matlab site. It consists of a 10 bit address space and a 16-bit data bus. I am getting extremely large (and incorrect) numbers from the simulation. I have pasted an example simulation output. # 0.00 radians --> sin = 13107
Hi i am putting togather a feature extraction module from facial images on FPGA. I have half of my algorithm ready and i can find the face in an image,then the eyes and all features from the eye. I have done all of this on matlab and i am interested in putting this module on fpga. Most of my code uses general mathematical calculations like ad
Hi, I have modelled a 3:rd order 3-bit delta sigma modulator in the matlab-toolbox and transformed it to continuous time. The continuous time modulator is modeled in Cadence using verilog-A. I have checked the impulse responses of both loopfilters in cadence and in matlab and they match so the linear systems should be equivalent. (...)
matlab error is simple 64bit IEEE-754 numeric. If you use some functions in matlab the error control is "eps" type eps=2.22e-16 That is typical much tighther than what simulator implement. But set reltol to eps of matlab could fail because most spice relevant models are calculated in 64bit floating point but sometimes with hard coded (...)
you have to use summation to do the integral. If you are using matlab, this may help you
you could use sinewaves with random frequency and phase or you could generate a noise file in matlab and use the vpwlf source in your schematics or write a verilog-a block that generates the noise.
You may have to dig more. I think if you use matlab with xilinx system generator or synplify dsp, you can generate verilog and c code from the system generator's or synplify dsp's block. But this is a very specific example and not generic
depends on you what you want to do. matlab is a calculation/high-level simulation software package verilog is a Hardware description language matlab is a commercial name of a piece of software verilog is a language ... not very comparable