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A short article on the design of the push-pull transformer: These are very problematic for newbies in power electronics, principally because in a classic topology there are 2 issues that dominate, namely; 1) leakage inductance &, 2) flux balance in the core - i.e. stair-casing of flux / Imag to failure. Many newb
Hi, it now tries to find a (more difficult) solution for 100MHz. It does not necessarily mean that it finds a solution .... it just tries. When an ASIC is specified to run at 100MHz, then this is just for a known function. Often an n bit binary counter. (Read documentation) But more complex logic nee
...moreover, with the above code it is being hold the maximum peak-to-peak, not updating with further smaller values. what is the best way to measure the AC current using ACS712-05T sensor module? You should compute the average value (sum divided by amount of samples); if you had mentioned the A/C rms value you would have searched
Probably it is possible to operate at the edge of the threshold voltage, but deep sub-threshold is not recommended becasue of worse matching between the circuit and the output current mirror. Question is how much area you have, do you have a limit? Stacked diodes are not too good (Mp1 and Mp2) in any design, rather use 1 diode and solve the cascod
Hi, Sorry, my fault. I also meant ADE7868. Still I donīt find the information that itīs not possible to use it in single phase application. Klaus
Hi, I am designing toothed log periodic that covers 900MHz, 1800MHz, 2100MHz, 2600MHz, 2450MHz. I will be designing on 160cmx160cm board. What is typically the first step to design such antenna. Also, how can i determine the number of tooths/radiators require? Thanks.
Hello, I would like to design rat-race mixer with 2 diodes. There is a lot of materials, but I didn't read any stuff around matching diodes. Is it needed or not? I saw both types - 1, diode is on rat race without any microstripe line 2, diode is shifted from rat-race with some matching. Does it depend on biasing, LO power, RF power or some
Yes, when the pot is set to the bottom - you will get 44.5Vout, and 4.04V out when the pot is turned to the top - in your schematic ... - - - Updated - - - from your other thread on this topic: 400 watt which mean 15v/25A input and 36v/12A Do you have a power supply that
My thought was using something like $table_model( $freq, "table_link.dat")If you mean Verilog-A, $freq is not available in Verilog-A.
I dont understand what you mean, I showed you how to define the constant.
Hiya everyone, I am currently using LTSPICE to perform few analog designs, and have a few queries regarding the tool. * Is there a way to measure the output impedance and gm of a transistor whilst performing DC analysis of a circuit?. * whilst performing AC analysis, how does one separate the phase and the gain plo
I plan to measure the output from an electrosurgical generator. 1. According to the user manual, the current output is AC current with ~500 kHz frequency and ~0.3 A amplitude. However, most digital multimeters have lower bandwidth than 500 kHz. How can I measure this current output? Do I have to use another measuring device instead of multimet
What do you mean with "same result"? You can't achieve more than 100% rectifier efficiency. Assuming 2V LED + rectifier forward voltage for simplicity, LED current can't be higher than 0.5 mA at 0 dBm respectively 50 uA at -10 dBm. Still visible with good LED, but rather dim.
You are cascading the output of one chip into another input, which in an offboard arrangement like using Arduino can mean a degradation in signal quality; By the way, you have not shown any detail of the assembly. In this case, you may want to increase the delay to see if the signal stays stable any longer.
am i doing it right, by terminating the other end with a ground. Yes, that creates a connection from the ports plus terminal to the ports local reference. one more question if i replace it with a series resistor, i wanna probe the signal after the series resistor, which side i should pl
This means that the nearest baud rate to 115200 with 16 MHz crystal in PIC16F876 is 16,000,000/(16*(1+7)) = 125,000, right ? where SPBRG register has to be written with 7. This can also be achieved with 8 MHz oscillator internal 8,000,000/(16*(1+3)) = 125,000, where SPBRG register has to be set at 3. It is possible to get more closer to 115200
Hi I am trying to debug a simulation mismatch. I am viewing the design through DFT Visualizer. I gave the pattern index of the simulated pattern. The visualizer shows 9 bits of data for each pin in the instance. It is something like this. D 000-000-000 Q 000-100-000- What does it mean? It means y
Does this mean ever after performing conjugate matching, there will be still reflections?.Voltage wave is reflected. Could someone explain the difference between these two conditions.Surely read and learn Power wave in Pozar?s Book, before EDA Tool Play. See the following
The opamp doesn't really help with having higher impedance of the current sources. The impedance is what it is coming from the gds of the transistors M2/M3. What it helps with is keeping the current source transistors under same conditions no matter which switch is on or off. If there was no buffer and respectively if you didn't have the left branc
Do you mean visualize the clock tree? It is not implemented during logic synthesis, only later in physical synthesis. I have a feeling you are looking for something that isn't there yet.