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15 Threads found on edaboard.com: Nanosim Command
Hi all My tools environment is : installv3.0 , scl10.9.3 vcs2012, nanosim2012 I have already run vco of nanosim examples, it's passed. But when I run NS-VCS in tutorial of nanosim examples, there was a error after "simv +COMPILE" command: ***** Warning: Stacksize soft limit 10240 K is too small, we prefer more (...)
I'm nanosim user. nanosim is release out of synopsys. When I read nanosim user guide, following comment is founded. The set_sim_eou command controls nanosim simulation engine accuracy (sim option) and nanosim MOS modeling accuracy (model option) during circuit simulation. An (...)
Hi ALL, Anyone use this command before "use_spice -cell" ? If let say I have this " use_spice -cell testchip_A". Is it the tool will choose all the entire ckt and sub-ckt in testchip_A will be SPICE? Thanks Tok
Hi Folks, Is there any manual command or setting in nanosim that allowing me to print the vto of the model? Many thanks in advance. Regards,
In using HSIM ( or nanosim), HSIMVCD2VEC command converts VCD file to Stimulus Input signal easily. Analog & Digital Block were easily simulated by this way. question : I written SIG (signal information file) like this #format % #scope tc_top #in RESETB and I extracted VCD file from verilog. But I get an error log file l
I don't know wheather what i think is right , so if anybody give me some hints , I will appreciate very much . 1. Verilog-top vcs files.v +ad=vcsAD.init we can add digital stimulus in the verilog-top module in " initial " procesure , and in the vcsAD.init file , add this command choose nanosim -nspi top.subA.spi -nvec file.vec -C cfg Is
hi all I succeeded compilation and simulation using nanosim but I can't generate waveform file(*.out) How can I generate that file in nanosim? I already specified waveformO/P using GUI thanks in advance.
hello , all I want to translate my vcd file to vec file so as to read in nanosim . I found the vcd2vec command , vcd2vec <-d > -nvcd vcd_file <-nsig sig_file> <-nvec vec_file> because i'm a newbie , i don't know what is the signal information file ,just found some syntax about this file in the ns-userguide. how can i get the signal
Dear all I have a digital design writen in verilog . after synthesis, i want to simulate in the transistor level using nanosim . and i've translate the verilog netlist into spice netlist using nettran command in hercules . and I want to also translate the testcase written in ntb in to spice stimulus or anyother vector file that nano
How to control the maximum time step in nanosim simulation? The following command is used in config file but no use: set_sim_aspd 0.01u set_acc_limit 2p set_pwl_limit 2p Can anyone give a way?
How to setup the simulation? I don't find the command in hsim and nanosim's user manual. anybody know this? 3x!!
i think nanosim is good for the mixed-signal design you can get it here
I want to install nanosim.2002.03 on redhat 8.0? But it needs the command "uncompress" to extract ns.taz,"uncompress" does not exist on redhat 8.0,what shall I do? Who can help me? Thanks a lot. Just install the package "ncompress" on disc 3.
Dear all: I try ro use vec file to run nanosim , the my circuit can not eat vec file . I use the command : nanosim -n top.spi top.cmd -out top.out -t 10u , What 's problem ? Do the vec file format is same as timemill /powrmill Thanks . Do anyone have these experiment ? Can you share some example files , Thanks
Does the nanosim inculde timemill or powermill ? I finised the nanosim install, I fins \bin\ have timemill , powrmill , and I run it . It's show not install ? What's problem ? Thanks